05 Feb, 2021
4 commits
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* origin/ls_v2020.04: (8 commits)
configs: ls208xa: Enable GIC_V3_ITS config
configs: ls1028a: Enable GIC_V3_ITS config
configs: ls1088a: Enable GIC_V3_ITS config
arm64: layerscape: Move GIC RD tables initialization to CPU setup function
fsl-layerscape: Kconfig: Select RESV_RAM config if GIC_V3_ITS is enabled
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Move GIC redistributor tables initialization to CPU setup function.
This patch introduces a GIC redistributor tables init function, and
moves the function of reserving memory for GIC redistributor tables
to soc.c and adds a argument for the memory size to reserve, BTW
rename the function so that it is more readable.Signed-off-by: Hou Zhiqiang
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The GIC redistributor tables initialization depends on RESV_RAM config,
so select RESV_RAM if GIC_V3_ITS is enabled.Signed-off-by: Hou Zhiqiang
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The initialization of gd->arch.resv_ram pointer should depend on if the
RESV_RAM config is enabled.Signed-off-by: Hou Zhiqiang
20 Nov, 2020
1 commit
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* origin/dn_uboot: (14 commits)
Revert "mmc: move mmc_power_cycle() after controller initialization"
Revert "mmc: rework mmc_set_initial_state"
board: freescale: vid.c: add parantheses to fix build warning
net: pfe_eth: read PFE ESBC header flash with spi_flash_read API
lx2160a: Fix address for secure boot headers
...
03 Nov, 2020
2 commits
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Check for NULL return value from fdt_getprop() in fdt_fixup_remove_jr()
Signed-off-by: Priyanka Singh
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The sdhc peripheral clock support for lx2162aqds was missed.
Fixes: 1f9ecf088930 ("armv8: lx2162a: Add Soc changes to support LX2162A")
Signed-off-by: Yangbo Lu
19 Oct, 2020
1 commit
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Conflicts:
arch/arm/cpu/armv8/Kconfig
drivers/pci/pcie_layerscape_fixup.c
drivers/video/imx/Makefile
drivers/video/nxp/Kconfig
drivers/video/nxp/Makefile
drivers/video/nxp/hdp/Makefile
drivers/video/nxp/hdp/test_base_sw.cSigned-off-by: Ye Li
09 Oct, 2020
1 commit
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As per hardware documentation, ECx_PMUX has precedence
over SerDes protocol.
For LX2160/LX2162 if DPMACs 17 and 18 are enabled as SGMII
through SerDes protocol but ECx_PMUX configured them as RGMII,
then the ports will be configured as RGMII and not SGMII.Signed-off-by: Razvan Ionut Cirjan
15 Sep, 2020
2 commits
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Fix coverity issue: Unsigned compared against 0 (NO_EFFECT)
unsigned_compare: This less-than-zero comparison of an unsigned
value is never true. freq < 0U.Issue: LF-2268
Signed-off-by: Larisa Grigore -
Fix coverity issue: The "and" condition address == qspi_real_and_all
&& address == 4294967295U can never be true because address cannot
be equal to two different values at the same time.Issue: LF-2267
Signed-off-by: Larisa Grigore
10 Sep, 2020
1 commit
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Make sure that SW_RST_REQ and RST_REQ_MSK are cleared
before triggering hardware reset request.Signed-off-by: Thirupathaiah Annapureddy
Signed-off-by: Meenakshi Aggarwal
08 Sep, 2020
1 commit
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LX2162 is LX2160 based SoC, it has same die as of LX2160
with different packaging.LX2162A support 64-bit 2.9GT/s DDR4 memory, i2c, micro-click module,
microSD card, eMMC support, serial console, qspi nor flash, qsgmii,
sgmii, 25g, 40g, 50g network interface, one usb 3.0 and serdes
interface to support three PCIe gen3 interface.Signed-off-by: Meenakshi Aggarwal
02 Sep, 2020
1 commit
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Configure DWC3's cache type to 'cacheable' for better
performance. Actually related register definition and values are SoC
specific, which means this setting is only applicable to Layerscape SoC,
not generic for all platforms which have integrated DWC3 IP.Signed-off-by: Ran Wang
28 Aug, 2020
2 commits
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Prepare for 3rd merge window of lf_uboot
Signed-off-by: Ye Li
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Prepare for 3rd merge window of lf_uboot
Signed-off-by: Ye Li
27 Aug, 2020
1 commit
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In the current implementation, u-boot creates iommu mappings only
for PCI devices enumarated at boot time thus does not take into
account more dynamic scenarios such as SR-IOV or PCI hot-plug.
Add an u-boot env var and a device tree property (to be used for
example in more static scenarios such as hardwired PCI endpoints
that get initialized later in the system setup) that would allow
two things:
- for a SRIOV capable PCI EP identified by its B.D.F specify
the maximum number of VFs that will ever be created for it
- for hot-plug case, specify the B.D.F with which the device
will show up on the PCI bus
More details can be found in the included documentation:
arch/arm/cpu/armv8/fsl-layerscape/doc/README.pci_iommu_extraSigned-off-by: Laurentiu Tudor
25 Aug, 2020
23 commits
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As per ec6617c39741adc6c54952564579e32c3c09c66f, update how the
armv8_switch_to_el* functions are called.
This commit fix secondary cores boot sequence.Issue: ALB-3114
Signed-off-by: Iustin Dumitrescu -
- init SRAM from address (with boundaries control)
- load elf from SD to SRAM address
- start M4 from SRAM address
- fixesSigned-off-by: Vicovan Ionut-Valentin-VCVV001
In initSRAM command add check for alignment on start address and size
and return usage if not aligned.
Create initsram.cIssue: ALB-2118, ALB-81
Signed-off-by: Matthew Nunez
Signed-off-by: Larisa Grigore -
Change the the DMA to copy 32 byte blocks. This necessitated a change to
the linker script to 32 byte align the .bss and .data sections. This
linker script change is specific to s32 platforms. Add a new linker
script arch/arm/cpu/armv8/s32v234/u-boot.lds for the s32 platforms to the
s32 cpu directory and add an entry to the configuration file
include/configs/s32v234_common.h to point the main Makefile to the new
linker script.Issue: ALB-1980
Signed-off-by: Matthew Nunez
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Add add assembly macros to separate platform-dependent code sections.
Place macros into header files that
are referenced in each platform's respective regs header file. Invoke
macros in place of platform dependent code sections.
Change code to align with the reference manual recommendation of
setting the DMA channel start bit last during channel configuration.Add #ifdef __INCLUDE_ASSEMBLY_MACROS__ to dma_macros.h to protect assembly
language macros from inclusion enc_embedded and envcrc tools that include
the soc registers header files and define __ASSEMBLY__ to get all macros
from header file.Issue: ALB-2436, ALB-2602
Signed-off-by: Matthew Nunez -
Add code to return number of bytes written if successful. Add check for
DMA errors when waiting for DMA transfer to complete.Issue: ALB-2118
Signed-off-by: Matthew Nunez
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Remove unused SRC_SCR_SW_RST.
Signed-off-by: Larisa Grigore
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This adds initial support and configuration for
the MicroSys SBC-S32 evaluation board.Signed-off-by: Kay Potthoff
- moved SYS_VENDOR config to board/freescale/Kconfig in order to avoid code
duplication.
- removed unrelevant configs from board/microsys/mpxs32v234/Kconfig
- documented magic numbers from /board/microsys/mpxs32v234/mpxs32v234.c
- documented magic numbers from /board/microsys/mpxs32v234/mpxs32v234.cfg
- removed BCM switch configSigned-off-by: Costin Carabas
Signed-off-by: Cosmin Oprea -
Intruduce initial support for s32v234 mini bluebox board.
Issue: ALB-1081
Signed-off-by: Stoica Cosmin-Stefan
Signed-off-by: Larisa Grigore -
PCIe clock source is now configurable and defaults to internal.
Every board except CUT 2.0 will use the internal one. To use
external clock, set hwconfig u-boot env variable.Signed-off-by: Heinz Wrobel
Signed-off-by: Irina Presa
Signed-off-by: Vicovan Ionut-Valentin-VCVV001
Signed-off-by: Costin Carabas -
Enable EP ignoring ERR009852
Signed-off-by: Heinz Wrobel
Signed-off-by: Aurelian Floricica
Signed-off-by: Costin Carabas
Signed-off-by: Stefan-Gabriel Mirea
Signed-off-by: Larisa Grigore -
Add new config for s32v234pcie board.
Signed-off-by: Stoica Cosmin-Stefan
Signed-off-by: Ionut Vicovan -
Introduce support for S32V234PCIE board.
Signed-off-by: Stoica Cosmin-Stefan
Signed-off-by: Vicovan Ionut-Valentin
Signed-off-by: Eddy Petrișor
Signed-off-by: Heinz Wrobel
Signed-off-by: Nica Dan
Signed-off-by: Cosmin Oprea
Signed-off-by: Larisa Grigore
Signed-off-by: Tomas Babinec -
Enable RGMII mode for ENET in SRC register.
Signed-off-by: Stoica Cosmin-Stefan
Signed-off-by: Heinz Wrobel
Signed-off-by: Irina Presa -
Add imx_get_mac_from_fuse if CONFIG_FEC_MXC is activated.
Signed-off-by: Stoica Cosmin-Stefan
Signed-off-by: phu.luuan
Signed-off-by: Larisa Grigore -
Implemented pinmuxing for ENET driver.
Signed-off-by: Stoica Cosmin-Stefan
Signed-off-by: Mihaela Martinas
Signed-off-by: Costin Carabas -
Added charge-all commands for CS0 and CS1 before MRW reset command.
This ensures robust DRAM initialization as a workaround to an
erratum regarding pad glitches when the recommended power-up sequence is
not followed. The glitches without this workaround may cause intermittent
boot failures in some cases.Issue: ALB-1879
Signed-off-by: Matthew Nunez -
SRC_GPR8.2D_ACE_QOS was introduced in TR2.0 and is used
to set the minimum QOS value for DCU DMA master.The QoS value of 2D-ACE moves discretely between Min and Max values.
• Min Value - SRC_GPR8[3:0]
• Max Value - 15 if SRC_GPR8[3] = 1, else 7.
This patch sets the min value to 13 (one level below GPU max priority)Issue: ALB-1463
Signed-off-by: Ghennadi Procopciuc
Signed-off-by: Cosmin Oprea
Signed-off-by: Stefan-Gabriel Mirea -
Fix DCU buffer underrun by establishing the appropriate
QOS.Issue: ALB-112
Signed-off-by: Grigore Lupescu
Signed-off-by: Cosmin Oprea
Signed-off-by: Larisa Grigore -
Enable and integrate 2D-ACE driver.
Issue: ALB-1201
Signed-off-by: Irina Presa
Signed-off-by: Le Trung Kien
Signed-off-by: Costin Carabas -
Add DCU pinmuxing.
Issue: ALB-1201
Signed-off-by: Irina Presa -
Configure necessary clocks for FB/DCU.
Issue: ALB-1201
Signed-off-by: Stoica Cosmin-Stefan
Signed-off-by: Grigore Lupescu
Signed-off-by: Irina Presa
Signed-off-by: Larisa Grigore -
Add Flexcan clock.
Signed-off-by: Chircu-Mare Bogdan-Petru
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Add "clocks" command that shows all configured clocks by u-boot.
Signed-off-by: Stoica Cosmin-Stefan
