05 Aug, 2015
13 commits
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Add Kconfig support
Signed-off-by: Lokesh Vutla
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Adding CPU detection support for Keystone2 Galileo.
Signed-off-by: Lokesh Vutla
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Currently to flash u-boot image onto NAND or SPI NOR flash, very first
time user need to use Code Composer Studio (CCS). This is cumbersome for
an user not familiar with CCS. This patch add simpler procedure using
uart boot mode for K2 EVMs.When UART bootmode is set and board is rebooted, the ROM boot loader
transfers the image at the beginning of the internal RAM. After the
transfer is complete the boot-loader sets the PC to the first internal RAM
address 0x0c000000. The u-boot.bin is linked to the address 0x0c001000.In order to use the u-boot.bin as an image for UART download, we need to
add 4K zeros prefix that act as 1K NOP instructions before reaching
0xc001000.Signed-off-by: Vitaly Andrianov
Signed-off-by: Lokesh Vutla
Acked-by: Murali Karicheri
Tested-by: Murali Karicheri -
Individual EVMs can have different phys connected to the Ethernet
MAC, so moving driver include from common config file to evm
config include fileSigned-off-by: Murali Karicheri
Signed-off-by: Mugunthan V N
Signed-off-by: Lokesh Vutla -
Since all the clocks are defined common, and has the same logic to get
the frequencies, use a common definition for for clk_get_rate().Reviewed-by: Tom Rini
Signed-off-by: Lokesh Vutla -
Remove unused external clocks and make a common definition
for all keystone platforms.Reviewed-by: Tom Rini
Signed-off-by: Lokesh Vutla -
This is just a cosmetic change that makes
the calling of pll init code looks much cleaner.Reviewed-by: Tom Rini
Reviewed-by: Vitaly Andrianov
Signed-off-by: Lokesh Vutla -
Register Base addresses are same for PLLs in all
keystone platforms. If a PLL is not available, the corresponding
register addresses are marked as reserved.
Hence use a common definition.Reviewed-by: Tom Rini
Signed-off-by: Lokesh Vutla -
Use common devspeed and armspeed definitions.
Also fix reading efuse bootrom register.Reviewed-by: Tom Rini
Reviewed-by: Vitaly Andrianov
Signed-off-by: Lokesh Vutla -
There are two types of PLL for all keystone platforms:
Main PLL, Secondary PLL. Instead of duplicating the same definition
for each secondary PLL, have a common function which does
initialization for both PLLs. And also add proper register
definitions.Reviewed-by: Tom Rini
Signed-off-by: Lokesh Vutla -
Add print_cpuinfo() function and enable
CONFIG_DISPLAY_CPUINFO for keystone platforms,
so that cpu info can be displayed during boot.Reviewed-by: Tom Rini
Reviewed-by: Vitaly Andrianov
Signed-off-by: Lokesh Vutla -
Add proper register definition for JTAG ID and
cleanup cpu_is_* functions.Reviewed-by: Tom Rini
Reviewed-by: Vitaly Andrianov
Signed-off-by: Lokesh Vutla -
Add support for detection of ES2.0 version of DRA7 family of
processors. ES2.0 is an incremental revision with various fixes
including the following:
- reset logic fixes
- few assymetric aging logic fixes
- MMC clock rate fixes
- Ethernet speed fixes
- edma fixes for mcasp[ravibabu@ti.com: posted internal for an older bootloader]
Signed-off-by: Ravi Babu
Signed-off-by: Nishanth Menon
Acked-by: Lokesh Vutla
04 Aug, 2015
3 commits
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Kernel stores information to the RTC_SCRATCH0 and RTC_SCRATCH1 registers
for wakeup from RTC-only mode. Parse these registers during SPL boot and
jump to the kernel resume vector if the device is waking up from RTC-only
mode.The RTC scratch register layout used is:
SCRATCH0 : bits00-31 : kernel resume address
SCRATCH1 : bits00-15 : RTC magic value used to detect valid config
SCRATCH1 : bits16-31 : board type information populated by bootloaderDuring the normal boot patch the SCRATCH1 : bits16-31 are updated with
the eeprom read board type data. In the rtc_only boot path the rtc
scratchpad register is read and the board type is determined and
correspondingly ddr dpll parameters are set. This is done so as to avoid
costly i2c read to eeprom.RTC-only mode support is currently only enabled for
am43xx_evm_rtconly_config.
This is not to be used with epos evm builds.Signed-off-by: Tero Kristo
[j-keerthy@ti.com] Ported to latest branch with minor fixes
Signed-off-by: Keerthy
Signed-off-by: Lokesh Vutla -
KS2_RSTCTRL_RSTYPE is defined as KS2_PLL_CNTRL_BASE + offset.
But ddr driver reads KS2_PLL_CNTRL_BASE + KS2_RSTCTRL_RSTYPE
for detecting reset type, which gives a wrong reset type.
Fixing it by just reading KS2_RSTCTRL_RSTYPE.Reviewed-by: Vitaly Andrianov
Signed-off-by: Lokesh Vutla -
This patch replaces not existing addr_uboot environment variable by
loadaddr at get_uboot_net and burn_uboot_xxx commands. Otherwise these
commands are broken.Fixes: 3e97f0b63c8e ("configs: ti_armv7_keystone2: switch addresses to generic addresses")
Acked-by: Nishanth Menon
Signed-off-by: Vitaly Andrianov
30 Jul, 2015
11 commits
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Because KS2 u-boot works in 32 bit address space the existing ram_size
global data field cannot be used. The maximum, which the get_ram_size()
can detect is 2GB only. The ft_board_setup() needs the actual ddr3 size
to fix up dtb.This commit introduces the ddr3_get_size() which uses SPD data to
calculate the ddr3 size. This function replaces the "ddr3_size"
environment variable, which was used to get the SODIMM size.For platforms, which don't have SODIMM with SPD and ddr3 is populated to
a board a simple ddr3_get_size function that returns ddr3 size has to be
implemented. See hardware-k2l.hSigned-off-by: Vitaly Andrianov
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This commit replaces hard-coded EMIF and PHY DDR3 configurations for
predefined SODIMMs to a calculated configuration. The SODIMM parameters
are read from SODIMM's SPD and used to calculated the configuration.The current commit supports calculation for DDR3 with 1600MHz and 1333MHz
only.Signed-off-by: Vitaly Andrianov
Signed-off-by: Lokesh Vutla -
[https://patchwork.ozlabs.org/patch/492997/]
K2L and L2E have different from K2HK EthSS version, which uses tag_info
field for destination slave port.
This commit configures appropriate BD filed tag_info or pkt_info depending
on navigator HW version.Before that commit the swinfo[2] was used for that purpose. Even if that
worked on K2HK devices, the correct field for K2HK is the pkt_info.Signed-off-by: Vitaly Andrianov
Acked-by: Murali Karicheri -
using http://git.ti.com/keystone-linux/boot-monitor/trees/master as
reference (tag K2_BM_15.07) the generated files do not have evm
extensions by default. So dont use -evm extension.Reviewed-by: Murali Karicheri
Reviewed-by: Tom Rini
Signed-off-by: Nishanth Menon -
Switch to using zImage instead of uImage. and while at it, start using
bootz as default. While at it, get rid of BOOTIMAGE define and start
using Linux upstream dtb file names.Reviewed-by: Murali Karicheri
Reviewed-by: Tom Rini
Signed-off-by: Nishanth Menon -
Use the defaults defined in DEFAULT_LINUX_BOOT_ENV
Reviewed-by: Murali Karicheri
Reviewed-by: Tom Rini
Signed-off-by: Nishanth Menon -
Try to maintain as much commonality by conditionally including stuff
in armv7_common as necessary and removing the common defines from
keystone2 header.Note: as part of this change, all keystone2 platforms will now start
using the generic u-boot prompt instead of the custom prompt.Signed-off-by: Nishanth Menon
Reviewed-by: Tom Rini -
rename the keystone2 common header into an keystone2 architecture
specific header which can then reuse the common ti_armv7 config headers.Acked-by: Vitaly Andrianov
Acked-By: Murali Karicheri
Reviewed-by: Tom Rini
Signed-off-by: Nishanth Menon -
CONFIG_LINUX_BOOT_PARAM_ADDR is not a valid configuration option. Do
just like what the rest of the world does.Acked-by: Vitaly Andrianov
Acked-By: Murali Karicheri
Reviewed-by: Tom Rini
Signed-off-by: Nishanth Menon -
Commit bd2c4522c26d5 ("ti: armv7: enable EXT support in SPL (using
ti_armv7_common.h)") enabled thumb mode only for SPL builds, however,
All TI armv7 platforms do support thumb, and there is no reason why the
space savings cannot be exploited for u-boot as well.Reported-by: Murali Karicheri
Suggested-by: Tom Rini
Signed-off-by: Nishanth Menon
Reviewed-by: Tom Rini -
TI armv7 based SoCs are based on two architectures - one based on OMAP
generation architecture and others based on Keystone architecture.Many of the options are architecture specific, however a lot are common
with v7 architecture. So, step 1 will be to move out OMAP specific stuff
from ti_armv7_common into a ti_armv7_omap.h header which is then used
by all the relevant architecture headers.Reviewed-by: Tom Rini
Signed-off-by: Nishanth Menon
23 Jul, 2015
11 commits
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Enable TI_EDMA3 for am43xx, this increases read performance by 1.5x.
Also EDMA3 base address for AM437X based EVMs
Signed-off-by: Vignesh R
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Enable TI_EDMA3 and SPL_DMA support, so as to reduce boot time. With
DMA enabled there is almost 3x improvement in read performance. This
helps in reducing boot time in qspiboot modeAlso add EDMA3 base address for DRA7XX and AM57XX.
Signed-off-by: Vignesh R
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Add BIT(x) macro definition to edma3 driver file. Fixes following
compiler warning when CONFIG_TI_EDMA3 is enabled for am437x and dra7x:drivers/dma/ti-edma3.c: In function ‘edma3_set_dest’:
drivers/dma/ti-edma3.c:92:10: warning: implicit declaration of function
‘BIT’ [-Wimplicit-function-declaration]Though this is not the appropriate place to add the definition, there is
a better patch coming up in the upstream and this can be cleaned up
once those patches are backported.Signed-off-by: Vignesh R
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ti_qspi uses memory map mode for faster read. Enabling DMA will increase
read speed to ~16MB/s @48MHz on DRA74 EVM.Signed-off-by: Vignesh R
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When doing a memory mapped copy we may have DMA available and thus need
to have this copy abstracted so that the driver can do it, rather than a
simple memcpy.Signed-off-by: Vignesh R
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Adds functions to enable and disable edma3 clocks which can be invoked
by drivers using edma3 to control the clocks.Signed-off-by: Vignesh R
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Adds functions to enable and disable edma3 clocks which can be invoked
by drivers using edma3 to control the clocks.Signed-off-by: Vignesh R
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Add do_disable_clocks() to disable clock domains and module clocks.
These clocks are enabled using do_enable_clocks().Signed-off-by: Vignesh R
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Add do_disable_clocks() to disable clock domains and module clocks.
These clocks are enabled using do_enable_clocks().Signed-off-by: Vignesh R
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Use memalign() with ARCH_DMA_MINALIGN to allocate read buffers.
This is required because, flash drivers may use DMA for read operations
and may have to invalidate the buffer before read.Signed-off-by: Vignesh R
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Use memalign() with ARCH_DMA_MINALIGN to allocate read buffers.
This is required because, flash drivers may use DMA for read operations
and may have to invalidate the buffer before read.Signed-off-by: Vignesh R
17 Jul, 2015
2 commits
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Given that all the pinmux for DRA7 is migrated to new
definitions, all the older ones are unused.
Cleanup all the unused definitions.Signed-off-by: Lokesh Vutla
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All the mux configurations needs to be done as part of the IODelay
sequence to avoid glitch.
Adding all the mux configuration for DRA72-evm.
MANUAL/VIRTUAL mode settings will be added once the data is available.Signed-off-by: Lokesh Vutla