01 May, 2020
3 commits
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Porting board codes, configurations, DTS and DDR initialization codes
for the DDR3L and DDR4 validation boards from imx_v2019.04Ready functions:
- DDR3L board: SD, UART, I2C, USB host and NAND
FPGA on the board controls WDOG_B and ENET PHY reset, so reset
and ethernet can't work- DDR4 board: SD/eMMC, I2C, ENET, Flexspi, UART and USB
Signed-off-by: Ye Li
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Porting board codes, configurations, DTS and DDR initialization codes
for the DDR3L and DDR4 validation boards from imx_v2019.04Supported modules
- DDR3L VAL: Two RANK DDR3L, QSPI B, eMMC/SD, RMII ENET, UART.
- DDR4 VAL: Two RANK DDR4, SD, NAND, RGMII ENET, UARTSigned-off-by: Ye Li
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iMX8MM DDR3L validation board uses GD25LQ16, but its id is not in
u-boot flash ids table. Add the new id and parameters into the table.Signed-off-by: Ye Li
(cherry picked from commit 04b813d4687028ce65c9772029d5da5500ec2e1c)
(cherry picked from commit 2257fe832100960b1cac96b92ecdd21d581bf33b)
30 Apr, 2020
6 commits
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Add the validation board support for iMX8QXP/iMX8DX platforms.
- iMX8QXP 21x21 DDR3 board
- iMX8QXP 21x21 LPDDR4 board
- iMX8QXP 17x17 LPDDR4 board
- iMX8DX 17x17 DDR3 boardReady functions: SD/eMMC, flexspi, ENET, USB, i2c and NAND
Signed-off-by: Ye Li
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Porting board codes, configurations and DTS for the LPDDR4 and DDR4
validation boards from imx_v2019.04Supported modules
- Flexspi, eMMC/SD, ENET0, UART, USB, legacy PCI driver,Signed-off-by: Ye Li
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The UART0 power domain nodes are missed in -u-boot.dtsi, so without
"u-boot,dm-spl" property, these power domain nodes can't be used at
u-boot early phase before relocation. It causes UART0 failed to be probed.Also remove "u-boot,dm-spl" for usdhc1, since this board does not have
eMMC, and the node is disabledSigned-off-by: Ye Li
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The UART0 power domain nodes are missed in -u-boot.dtsi. Without
"u-boot,dm-spl" property, the UART0 fails to probe at u-boot early
phase before relocation.Signed-off-by: Ye Li
Reviewed-by: Peng Fan -
The reset pins for LVDS to HDMI video card and MIPI to HDMI card are
not added in current codes, but kernel requires u-boot to reset cards
to resolve the shared reset pin in dual display case.
So add the reset pins control back.Signed-off-by: Ye Li
Reviewed-by: Peng Fan -
add the nandfit_part environment for iMX8dxl, so uuu will burn the
flash.bin to nandfit partition.Signed-off-by: Han Xu
28 Apr, 2020
1 commit
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Since the new u-boot MMC driver depends on DTB property to enable
UHS or HS400/HS400ES. Add the properties to USDHC nodes for NXP iMX8
and iMX8M boards.Signed-off-by: Ye Li
27 Apr, 2020
30 commits
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Added default environment for hdp loading.
Added hdp loading as default for iMX8QM ARM2 and MEK boards.Signed-off-by: Oliver Brown
(cherry picked from commit 432e5b4347841095c3b5a8a0d106f35deadd006e)
(cherry picked from commit cb78a32fa8eb8c37932be003ebe4fa1f8c46c1d5) -
Port the HDMI lib frrom imx_v2019.04 u-boot, which is used for
HDP TX/RX firmware loading and HDMI displaySigned-off-by: Ye Li
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Since the freescale entity does not exist, remove it from CPU info print.
Signed-off-by: Ye Li
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This reverts commit bbe3d4a6c14e17d251029e4dde07f184244e9a4a.
If we set to periperal at exiting, will get a windows USB warning since
it detect a new connection on device mode. Remove this patch to fix
the problemSigned-off-by: Ye Li
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Add assigned clocks rate to USB3 node, so gadget driver can set
the clocks before probing the driver.Signed-off-by: Ye Li
Reviewe-by: Peng Fan
(cherry picked from commit bf02de76bd2b25a4f99d63c4ecc2cf3758095cbe) -
Current codes depend on default clock setting on SCFW, but on QXP c0, the
USB3 BUS clock requires a lower clock at 250Mhz. Found USB TRB error on
8DX (QXP c0), if we use default 500Mhz bus clock.Per SCFW suggestion, SW should be responsible for setting up these clocks
not depending on SCFW. So adding the clock set rate for all USB3 clocksSigned-off-by: Ye Li
Reviewe-by: Peng Fan
(cherry picked from commit 601da3c130fc6b0a864645009cf50c2d4a884d39) -
parameter 'end address' must be inclusive of address range.
And include cpu_func.h header fileSigned-off-by: Seb Fagard
Reviewed-by: Ye Li
(cherry picked from commit d17ae0d28de88bb637f6c1df5ba5c6d4f0779055) -
parameter 'end address' must be inclusive of address range.
Signed-off-by: Seb Fagard
Reviewed-by: Ye Li -
add the new imx8dxl into nandbcb support list.
Signed-off-by: Han Xu
Reviewed-by: Ye Li
(cherry picked from commit 3f791ca3cfb6e1e24e2c96223935f242d84c7818) -
add nand pad settings and init code in imx8dxl board file.
Signed-off-by: Han Xu
Reviewed-by: Ye Li
(cherry picked from commit fdb39fffc55c2ff02fe00a94b3f0208fae75d6df) -
add the nand related env settings for imx8dxl ddr3 evk
Signed-off-by: Han Xu
Reviewed-by: Ye Li
(cherry picked from commit 871df306ff98a93c70d7babe515acd8b680cf99b) -
add nand node and iomux configs for imx8dxl nand support in dts
Signed-off-by: Han Xu
Reviewed-by: Ye Li
(cherry picked from commit 58f2e4885b3e73e7fd071796a3d52ff900e1df9a) -
add new nand config for imx8dxl nand boot
Signed-off-by: Han Xu
Reviewed-by: Ye Li
(cherry picked from commit b71acb264d115300ad04f797e4758a2d2adc3f3f) -
Change the buffer to use the real buffer, not vring space.
Because we are going to let M4 publish the resource table into vring
space for kernel usage. uboot will overwrite it, so use the real shared
buffer space 0x90400000Script:
sed -i "s/CONFIG_IMX_VSERVICE_SHARED_BUFFER=0x90000000/CONFIG_IMX_VSERVICE_SHARED_BUFFER=0x90400000/" configs/*Signed-off-by: Peng Fan
Reviewed-by: Ye Li
(cherry picked from commit a996d907282746a4feca5a5c03f7e5326d9c1bda) -
Enable print to show the DRAM rate of current setting and training
result.Signed-off-by: Ye Li
Reviewed-by: Peng Fan
(cherry picked from commit 8fa319ae929c37f119fbfadfbb2881cba337b249) -
Since patch MLK-23656 will re-initialize the connectivty subsystem,
we don't need to reset ENET1 explicitely now. And this reset actually
has some limitations:
1. It needs power on the ENET1 resource firstly.
2. It will configure PER clock to 24M OSC. So previous clock setting
is lost.Signed-off-by: Ye Li
Reviewed-by: Fugang Duan
(cherry picked from commit 861b3c324626b56e2c815bc04c342af53e957334) -
When boot from usb, scfw won't re-initialize the connectivity subsystem.
This special behavior is for uuu virtual console feature.
However, it causes entire connectivity SS using settings from ROM. We found
the bus clocks are from AVPLL not DPLL and lower than ADD required. It causes
OTG performance drop about 20% during fastboot because more NYET handshake
added into each transfer.To workaround the issue, we need to power off all usb resources to let connectivity
SS power down at early uboot phase. Then power on any resource in conn SS will
re-initialize the subsystem.Regard to auto USB port check, we only has this workaround in u-boot not in SPL.
SPL uses SDP to download other images, the sizes are very small and not impacted.Signed-off-by: Ye Li
Tested-by: Peter Chen
Acked-by: Peng Fan
(cherry picked from commit 625b061107928377f51859ee9c0558dc7d56c137) -
USB0 and USB1 work.
fastboot work
eqos Network work
Only 512MB in DDR3 evk boards.Signed-off-by: Frank Li
(cherry picked from commit 824d85bb9862264317c43ab10af80e3d946111ee) -
The previous NAND boot looking the rootfs by the mtd index, which is
easy get impacted by other mtd devices, such as SPI NOR. Changed it to
the unique nand rootfs partition name can avoid this issue.Signed-off-by: Han Xu
(cherry picked from commit a69e5febae6c1f98b2f2304501ca8fed085299b8) -
Old documentation styling mentioned all iMX8M devices variants (iMX8M,
iMX8MM, iMX8MN) for every SoC reference.As the secure/encrypted boot procedure is similar for all the variants
(including iMX8MP), make this information common for the whole iMX8M
family to keep the documentation clean instead of adding iMX8MP on every
reference.
Specific information for single variants is described when needed.Signed-off-by: Vanessa Maegima
Reviewed-by: Ye Li
(cherry picked from commit 24c72869a608ffbcce908770953a6d87514f2253) -
iMX8MP has shifted market segment fuse one bit from 0x440 [7:6] to [6:5],
correct it in imx common codes.Signed-off-by: Ye Li
Reviewed-by: Peng Fan
(cherry picked from commit 798c09499190ed0fc66e3f0207bdc6343af6027f) -
Enable FDT overlay for all the i.MX 8 series.
Instead of modifying the FDT like done currently,
allow u-boot to apply an overlay instead.
Fallback to previous imlementation if overlay fails.Signed-off-by: Silvano di Ninno
Reviewed-by: Ye Li
(cherry picked from commit 13463bf47b27771976f8b824a20224f599a0518a) -
v5.4 kernel has changed the nodes structure in its DTB. u-boot
implements the ft_system_setup to update kernel DTB for imx8m
variant parts (modules fused). Need sync the codes to support
v5.4 DTB.Signed-off-by: Ye Li
Reviewed-by: Peng Fan
(cherry picked from commit 3f55fbb3c010389868f218482413f1375661eaeb) -
In uMCTL2 Databook, for LPDDR4, it is recommended to set
this register to 1. This can avoid ddr bandwidth is lower
after booting with running for a while.Signed-off-by: Jian Li
Reviewed-by: Ye Li
(cherry picked from commit 80f2cd3f62f55a75584747d9107446d0802fc90a) -
Add defconfig to support flexspi boot for both SPL and u-boot
Signed-off-by: Ye Li
Tested-by: Han Xu
Acked-by: Peng Fan
(cherry picked from commit dea8a1e5e104310a07d670c86aa416d7292c1564) -
usb boot EQOS TSN doesn't work, because it required to reset
EQOS TSN resource.Reviewed-by: Richard Zhu
Signed-off-by: Fugang Duan
(cherry picked from commit 52462b15e6bceac27759b6fa57552dae0f1cc6b6) -
On CDNS3 usb, the IOC interrupt for IN is triggered when data
move from memory to FIFO, but not for the transfer completion.When running fastboot command "continue" to disconnect USB device.
The last message "OKAY" sent from device setups a callback to IOC
interrupt handler and disconnect with host in this callback.
However, the real transfer hasn't finished due to host doesn't send
IN at that time, it causes the error at host side.This patch will reset all enabled endpoints in pull up before disable
the device mode. The reset checks the EP_STS.BUFFEREMPTY bit to ensure
data has sent to host.Signed-off-by: Ye Li
Signed-off-by: Peter Chen
Reviewed-by: Peter Chen
(cherry picked from commit 9be87bc89c1e75755b524703dc536c93bd3fbe5c) -
USB OH clock is default enabled by SCFW because it shared
between two USB controller.Signed-off-by: Frank Li
(cherry picked from commit 7a8ec829d4410c51550ad7a589645595042ba541) -
fix usb_power_config hard code to first one
Signed-off-by: Frank Li
(cherry picked from commit dbe54e1f3625269f7bc422ccf53693cb9e0f949b) -
Add device trees, configs and board files for
the i.MX8DXL EVK board.Signed-off-by: Ye Li
Signed-off-by: Teo Hall
(cherry picked from commit f0238679d332f1af2148d467804a93de8f868bd5)
