06 Oct, 2014
5 commits
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Trying to enumerate USB devices connected via ULPI to T20 failed as
follows:USB2: ULPI integrity check failed
Git bisecting revealed the following commit being at odds:
commit 2d34151f7501ddaa599897f0d89ad576126b03eb
usb: tegra: refactor PHY type selectionLooking at above commit one quickly identifies a copy paste error which
this patch fixes. Happy ULPIing again (;-p).Signed-off-by: Marcel Ziswiler
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Periodic schedules tracks how many int_queue-s are active, and decides whether
or not to en/disable the periodic schedule based on this. This is clearly
a per controller thing.Signed-off-by: Hans de Goede
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When we first start an int queue, the qh's overlay area is all zeros. This
gets filled by the hc with the actual qtd values as soon as it advances
the queue, but we may call poll_int_queue before then, in which case we
would think the transfer has completed as the hc has not yet copied the
qt_token to the overlay, so the active flag is not set.This fixes this by checking the actual qtd token, rather then the overlay.
This also fixes a (theoretical) race where we see the completion in the
overlay and free and re-use the qtd before the hc has completed writing back
the overlay to the actual qtd.Signed-off-by: Hans de Goede
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Signed-off-by: Hans de Goede
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For full / low speed devices we need to get the devnum and portnr of the tt,
so of the first upstream usb-2 hub, not of the parent device (which may be a
usb-1 hub).Signed-off-by: Hans de Goede
19 Sep, 2014
2 commits
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If the SoC has pcr, we use pcr (peripheral control register)
to enable or disable clock.Signed-off-by: Bo Shen
Signed-off-by: Andreas Bießmann -
If the SoC has pcr, we use pcr (peripheral control register)
to enable or disable clock.Signed-off-by: Bo Shen
Signed-off-by: Andreas Bießmann
29 Aug, 2014
1 commit
09 Aug, 2014
2 commits
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echi-rmobile does not support xHCI. This removes xHCI address
from address table. And this revise a value of CONFIG_USB_MAX_CONTROLLER_COUNT
for lager board and koelsh board.Signed-off-by: Nobuhiro Iwamatsu
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R8A7794 has same IP of USB controller as R8A7790 and R8A7791.
This addes support for R8A7794.Signed-off-by: Nobuhiro Iwamatsu
31 Jul, 2014
1 commit
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The Allwinner aka sunxi SoCs have one or more USB host controllers.
This adds a driver for their EHCI.Signed-off-by: Roman Byshko
Acked-by: Marek Vasut
Signed-off-by: Hans de Goede
22 Jul, 2014
1 commit
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upper_32_bits() and lower_32_bits() have been ported into linux/compat.h.
Start use them now in drivers/usb/host/xhci.h.Signed-off-by: Lijun Pan
10 Jul, 2014
1 commit
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some boards won't work if the PHY isn't explicitly
powered up.Signed-off-by: Felipe Balbi
05 Jul, 2014
1 commit
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This patch returns back support for old ep93xx processors family
Signed-off-by: Sergey Kostanbaev
Cc: albert.u.boot@aribaud.net
26 Jun, 2014
3 commits
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Because of the brackets the & and && is evaluated before
the comparison. This is likely not the intention. Change
it to test the first and second condition to both be true.cc: Marek Vasut
Signed-off-by: Jeroen Hofstee -
Initialization of r8a66597 info structure is not enough.
Because initilization was used size of pointer.
This fixes that use size of r8a6659 info structure.Signed-off-by: Yasuhisa Umano
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This driver is processed as two USB hub despite one.
The number of root hub is defined in R8A66597_MAX_ROOT_HUB.
This fixes that register is accessed by using the definition
of R8A66597_MAX_ROOT_HUB.Signed-off-by: Yasuhisa Umano
24 May, 2014
1 commit
23 May, 2014
1 commit
17 May, 2014
1 commit
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Define and use CONTROL_REGISTER_W1C_MASK to make sure that
w1c bits of usb control register do not get reset while
writing any other bitSigned-off-by: Nikhil Badola
Signed-off-by: Ramneek Mehresh
Reviewed-by: York Sun
15 May, 2014
3 commits
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A few changes are made to the Tegra EHCI driver so that it can set
everything up for device-mode operation on the first USB controller.
This can be used in conjunction with ci_udc.c to operate as a USB
device.Detailed changes are:
* Rename set_host_mode() to set_up_vbus() since that's really what it
does.* Modify set_up_vbus() to know whether it's initializing in host or
device mode, and:- Skip the external VBUS check in device mode, since external VBUS is
expected in this case.- Disable VBUS output in device mode.
* Modify init_phy_mux() to know whether it's initializing in host or
device mode, and hence skip setting USBMODE_CM_HC (which enables host
mode) in device mode. See the comments in that function for why this
is safe w.r.t. the ordering requirements of PHY selection.* Modify init_utmi_usb_controller() to force "b session valid" in device
mode, since the HW requires this. This is done in UTMI-specific code,
since we only support device mode on the first USB controller, and that
controller can only talk to a UTMI PHY.* Enhance ehci_hcd_init() to error-check the requested host-/device-mode
vs. the dr_mode (dual-role mode) value present in device tree, and the
HW configurations which support device mode.* Enhance ehci_hcd_init() not to skip HW initialization when switching
between host and device mode on a controller. This requires remembering
which mode the last initialization used.Cc: Jim Lin
Cc: Stefan Agner
Signed-off-by: Stephen Warren -
Both init_{utmi,ulpi}_usb_controller() have nearly identical code for
PHY type selection. Pull this out into a common function to remove the
duplication.Cc: Jim Lin
Cc: Stefan Agner
Signed-off-by: Stephen Warren -
The TRM for Tegra30 and later all state that USBMODE_CM_HC must be set
before writing to hostpc1_devlc to select which PHY to use for a USB
controller. However, neither init_{utmi,ulpi}_usb_controller() do this
today, so the register writes they perform for PHY selection do not
work.For the UTMI case, this was hacked around in commit 7e44d9320ed4 "ARM:
Tegra: USB: EHCI: Add support for Tegra30/Tegra114" by adding code to
ehci_hcd_init() which sets USBMODE_CM_HC and duplicates the PHY
selection register write. This code doesn't cover the ULPI case, so I
wouldn't be surprised if ULPI doesn't work with the current code, unless
the ordering requirement only ends up being an issue in HW for UTMI not
ULPI.This patch fixes init_{utmi,ulpi}_usb_controller() to correctly set
USBMODE_CM_HC before selecting the PHY. Now that this works, we can
remove the duplicate UTMI-specific code in ehci_hcd_init(), thus
simplifying that function.Cc: Jim Lin
Cc: Stefan Agner
Signed-off-by: Stephen Warren
14 May, 2014
1 commit
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Added USB host driver for zynq.
Signed-off-by: Siva Durga Prasad Paladugu
Signed-off-by: Michal Simek
09 May, 2014
1 commit
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Conflicts:
drivers/net/Makefile(trivial merge)
30 Apr, 2014
3 commits
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Commit 4a271cb1b4ff doesn't take into account that fdtdec_setup_gpio()
returns success when the gpio passed to it is FDT_GPIO_NONE (no
gpio node found in the fdtdec_decode_gpio() call). This results in
calling gpio_direction_output() on invalid gpio. For this reason
executing "usb start" command on Arndale causes data abort in the
ehci-exynos driver.Add the fdt_gpio_isvalid() check to fix that problem.
Signed-off-by: Andrey Konovalov
Cc: Julius Werner
Cc: Simon Glass
Cc: Minkyu Kang
Cc: Marek Vasut -
Update the EHCI driver to support interrupt transfers on PowerPC.
Signed-off-by: Adrian Cox
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The rmobile SoC has usb host controller.
This supports USB controllers listed in the R8A7790, R8A7791 and R8A7740.Signed-off-by: Nobuhiro Iwamatsu
Reviewed-by: Marek Vasut
23 Apr, 2014
3 commits
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Increase TXFIFOTHRES field value in TXFILLTUNING register of usb for T4 Rev 2.0.
This decreases data burst rate with which data packets are posted from the TX
latency FIFO to compensate for latencies in DDR pipeline during DMA.
This avoids Tx buffer underruns and leads to successful usb writesSigned-off-by: Ramneek Mehresh
Signed-off-by: Nikhil Badola
Reviewed-by: York Sun -
Put a delay of 5 millisecond after reset so that ULPI phy
gets enough time to come out of reset. Erratum A007075 applies
to following SOCs and their variants, if any
P1010 rev 1.0
B4860 rev 1.0, 2.0
P4080 rev 2.0, 3.0Signed-off-by: Nikhil Badola
Reviewed-by: York Sun -
Set correct phy_type value for second USB controller.
This is required for supporting SOCs having 2 USB controllers
working simultaneously, one with UTMI phy and other with ULPI phySigned-off-by: Nikhil Badola
Reviewed-by: York Sun
17 Apr, 2014
3 commits
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Combine the Tegra USB header file into one header file for all SoCs.
Use ifdef to account for the difference, especially Tegra20 is quite
different from newer SoCs. This avoids duplication, mainly for
Tegra30 and newer devices.Reviewed-by: Stephen Warren
Signed-off-by: Stefan Agner
Signed-off-by: Tom Warren -
On Tegra30 and later, the PTS (parallel transceiver select) and STS
(serial transceiver select) are part of the HOSTPC1_DEVLC_0 register
rather than PORTSC1_0 register. Since the reset configuration
usually matches the intended configuration, this error did not show
up on Tegra30 devices.Also use the slightly different bit fields of first USB, (USBD) on
Tegra20 and move those definitions to the Tegra20 specific header
file.Reviewed-by: Stephen Warren
Signed-off-by: Stefan Agner
Signed-off-by: Tom Warren -
Clear the forced powerdown bit in the UTMIP_PLL_CFG2_0 register
which brings USB2 in UTMI mode to work. This was clearly missing
since the forced powerdown bit is set in reset by default for all
USB ports.Acked-by: Stephen Warren
Signed-off-by: Stefan Agner
Tested-by: Stephen Warren
Signed-off-by: Tom Warren
11 Mar, 2014
3 commits
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Many USB host controller drivers contain almost identical copies of the
same virtual root hub descriptors. Put these into a common file to avoid
duplication.Note that there were some very minor differences between the descriptors
in the various files, such as:- USB 1.0 vs. USB 1.1
- Manufacturer/Device ID
- Max packet size
- String contentI assume these aren't relevant.
Cc: Thomas Lange
Cc: Shinya Kuribayashi
Cc: Gary Jennejohn
Cc: Wolfgang Denk
Cc: Eric Millbrandt
Cc: Pierre Aubert
Cc: Stefan Roese
Cc: Daniel Hellstrom
Cc: Denis Peter
Cc: Rodolfo Giometti
Cc: Zhang Wei
Cc: Mateusz Zalega
Cc: Remy Bohmer
Cc: Markus Klotzbuecher
Cc: Minkyu Kang
Cc: Gary Jennejohn
Cc: C Nauman
Cc: David Müller
Cc: Yoshihiro Shimoda
Cc: Nobuhiro Iwamatsu
Cc: Thomas Abraham
Cc: Tom Rini
Cc: Andrew Murray
Cc: Matej Frančeškin
Cc: Cliff Cai
Cc: Bryan Wu
Signed-off-by: Stephen Warren -
These data structures are passed to cache-flushing routines, and hence
must be conform to both the USB the cache-flusing alignment requirements.
That means aligning to USB_DMA_MINALIGN. This is important on systems
where cache lines are >32 bytes.Signed-off-by: Stephen Warren
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Section 4.10.2 "Advance Queue" of ehci-specification-for-usb.pdf
specifies how an EHCI controller loads a new QTD for processing if the
QH is not already marked as active. It states:=====
If the field Bytes to Transfer is not zero and the T-bit in the Alternate
Next qTD Pointer is set to zero, then the host controller uses the
Alternate Next qTD Pointer. Otherwise, the host controller uses the Next
qTD Pointer. If Next qTD Pointer’s T-bit is set to a one, then the host
controller exits this state and uses the horizontal pointer to the next
schedule data structure.
=====Hence, we must ensure that the alternate next QTD pointer's T-bit
(TERMINATE) is set, so the EHCI controller knows to use the next QTD
pointer.Signed-off-by: Stephen Warren
26 Feb, 2014
1 commit
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With this, fixup a trivial build error of get_effective_memsize needing
to be updated in the new board/freescale/p1010rdb/spl.cSigned-off-by: Tom Rini
25 Feb, 2014
1 commit
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Use first four characters for phy_type comparison. Strcmp() should not
be used to check the phy_type string which maybe parsed by hwconfig_subarg().
Hwconfig_subarg() returns part of hwconfig string starting from
phy_type value till the end of the string. Since phy_type could be
either "utmi" or "ulpi", strncmp() should be used so that a comparison
of "utmi;fsl_ddr:bank_intlv=auto" with "utmi" will succeed.Signed-off-by: Shaohui Xie
Signed-off-by: Nikhil Badola
Reviewed-by: York Sun
06 Feb, 2014
1 commit
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The driver is no longer used, remove it.
Signed-off-by: Marek Vasut
Cc: Albert Aribaud
Cc: Michael Schwingen
Cc: Tom Rini
