05 Mar, 2018
1 commit
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Thomas reported U-Boot failed to build host tools if libfdt-devel
package is installed because tools include libfdt headers from
/usr/include/ instead of using internal ones.This commit moves the header code:
include/libfdt.h -> include/linux/libfdt.h
include/libfdt_env.h -> include/linux/libfdt_env.hand replaces include directives:
#include -> #include
#include -> #includeReported-by: Thomas Petazzoni
Signed-off-by: Masahiro Yamada
13 Jun, 2017
1 commit
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Signed-off-by: York Sun
19 Jan, 2016
1 commit
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In a number of places we had wordings of the GPL (or LGPL in a few
cases) license text that were split in such a way that it wasn't caught
previously. Convert all of these to the correct SPDX-License-Identifier
tag.Signed-off-by: Tom Rini
21 Nov, 2014
1 commit
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This function can fail if the device tree runs out of space. Rather than
silently booting with an incomplete device tree, allow the failure to be
detected.Unfortunately this involves changing a lot of places in the code. I have
not changed behvaiour to return an error where one is not currently
returned, to avoid unexpected breakage.Eventually it would be nice to allow boards to register functions to be
called to update the device tree. This would avoid all the many functions
to do this. However it's not clear yet if this should be done using driver
model or with a linker list. This work is left for later.Signed-off-by: Simon Glass
Acked-by: Anatolij Gustschin
25 Sep, 2014
1 commit
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Since commit ddaf5c8f3030050fcd356a1e49e3ee8f8f52c6d4
(patman: RunPipe() should not pipe stdout/stderr unless asked),
Patman spits lots of "Invalid MAINTAINERS address: '-'"
error messages for patches with global changes.
It takes too long for Patman to process them.Anyway, "M: -" does not carry any important information.
Rather, it is just like a place holder in case of assigning
a new board maintainer. Let's comment out.This commit can be reproduced by the following command:
find . -name MAINTAINERS | xargs sed -i -e '/^M:[[:blank:]]*-$/s/^/#/'
Signed-off-by: Masahiro Yamada
14 Sep, 2014
1 commit
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Now the types of CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME}
are specified in arch/Kconfig.We can delete the ones in arch and board Kconfig files.
This commit can be easily reproduced by the following command:
find . -name Kconfig -a ! -path ./arch/Kconfig | xargs sed -i -e '
/config[[:space:]]SYS_\(ARCH\|CPU\|SOC\|\VENDOR\|BOARD\|CONFIG_NAME\)/ {
N
s/\n[[:space:]]*string//
}
'Signed-off-by: Masahiro Yamada
30 Jul, 2014
2 commits
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We have switched to Kconfig and the boards.cfg file is going to
be removed. We have to retrieve the board status and maintainers
information from it.The MAINTAINERS format as in Linux Kernel would be nice
because we can crib the scripts/get_maintainer.pl script.After some discussion, we chose to put a MAINTAINERS file under each
board directory, not the top-level one because we want to collect
relevant information for a board into a single place.TODO:
Modify get_maintainer.pl to scan multiple MAINTAINERS files.Signed-off-by: Masahiro Yamada
Suggested-by: Tom Rini
Acked-by: Simon Glass -
This commit adds:
- arch/${ARCH}/Kconfig
provide a menu to select target boards
- board/${VENDOR}/${BOARD}/Kconfig or board/${BOARD}/Kconfig
set CONFIG macros to the appropriate values for each board
- configs/${TARGET_BOARD}_defconfig
default setting of each board(This commit was automatically generated by a conversion script
based on boards.cfg)In Linux Kernel, defconfig files are located under
arch/${ARCH}/configs/ directory.
It works in Linux Kernel since ARCH is always given from the
command line for cross compile.But in U-Boot, ARCH is not given from the command line.
Which means we cannot know ARCH until the board configuration is done.
That is why all the "*_defconfig" files should be gathered into a
single directory ./configs/.Signed-off-by: Masahiro Yamada
Acked-by: Simon Glass
26 Nov, 2013
1 commit
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Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs.
The similar DDR controllers will be used for ARM-based SoCs.Signed-off-by: York Sun
01 Nov, 2013
1 commit
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Signed-off-by: Masahiro Yamada
Cc: Wolfgang Denk
Cc: Kim Phillips
Cc: York Sun
Cc: Stefan Roese
17 Oct, 2013
1 commit
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Some DDR related structures present in fsl_ddr_dimm_params.h, fsl_ddr_sdram.h, ddr_spd.h
has various parameters with embedded acronyms capitalized that trigger the CamelCase
warning in checkpatch.plConvert those variable names to smallcase naming convention and modify all files
which are using these structures with modified structures.Signed-off-by: Priyanka Jain
24 Jul, 2013
1 commit
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Signed-off-by: Wolfgang Denk
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini
29 Jul, 2012
1 commit
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Also drop a few files referring to no longer / not yet supported
boards.Signed-off-by: Wolfgang Denk
Cc: Prafulla Wadaskar
Cc: Stefan Roese
Cc: Kim Phillips
Cc: Andy Fleming
Cc: Jason Jin
Cc: Stefano Babic
Cc: Daniel Schwierzeck
Acked-by: Stefano Babic
Acked-by: Daniel Schwierzeck
28 Feb, 2012
1 commit
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Boards may have things they want done before or after normal phy config.
Letting the boards call drv->config allows them more flexibilty.
Boards affected by this change are corenet_ds and mpc8544ds.Signed-off-by: Troy Kisky
Acked-by: Dirk Behme
16 Oct, 2011
1 commit
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The top level Makefile does not do any recursion into subdirs when
cleaning, so these clean/distclean targets in random arch/board dirs
never get used. Punt them all.MAKEALL didn't report any errors related to this that I could see.
Signed-off-by: Mike Frysinger
21 Apr, 2011
1 commit
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This converts tsec to use the new PHY Lib. All of the old PHY support
is ripped out. The old MDIO driver is split off, and placed in
fsl_mdio.c. The initialization is modified to initialize the MDIO
driver as well. The powerpc config file is modified to configure PHYLIB
if TSEC_ENET is configured.Signed-off-by: Mingkai Hu
Signed-off-by: Andy Fleming
Signed-off-by: Kumar Gala
Acked-by: Detlev Zundel
04 Apr, 2011
2 commits
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Move fsl_ddr_get_spd into common mpc8xxx/ddr/main.c as most boards
pretty much do the same thing. The only variations are in how many
controllers or DIMMs per controller exist. To make this work we
standardize on the names of the SPD_EEPROM_ADDRESS defines based on the
use case of the board.We allow boards to override get_spd to either do board specific fixups
to the SPD data or deal with any unique behavior of how the SPD eeproms
are wired up.Signed-off-by: Kumar Gala
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Every 85xx board implements fsl_ddr_get_mem_data_rate via get_ddr_freq()
and every 86xx board uses get_bus_freq(). If implement get_ddr_freq()
as a static inline to call get_bus_freq() we can remove
fsl_ddr_get_mem_data_rate altogether and just call get_ddr_freq()
directly.Signed-off-by: Kumar Gala
14 Jan, 2011
4 commits
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Remove duplicated code in MPC8544DS board and utilize the common
fsl_pcie_init_ctrl(). We also now dynamically setup the LAWs for PCI
controllers based on which PCIe controllers are enabled.We don't use the full fsl_pcie_init_ctrl() since we have to handle PCIE3
specially to setup the additional memory map region and we utilize a
single LAW to cover the controller.Signed-off-by: Kumar Gala
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Correct initdram to use phys_size_t to represent the size of
dram; instead of changing this all over the place, and correcting
all the other random errors I've noticed, create a
common initdram that is used by all non-corenet 85xx parts. Most
of the initdram() functions were identical, with 2 common differences:1) DDR tlbs for the fixed_sdram case were set up in initdram() on
some boards, and were part of the tlb_table on others. I have
changed them all over to the initdram() method - we shouldn't
be accessing dram before this point so they don't need to be
done sooner, and this seems cleaner.2) Parts that require the DDR11 erratum workaround had different
implementations - I have adopted the version from the Freescale
errata document. It also looks like some of the versions were
buggy, and, depending on timing, could have resulted in the
DDR controller being disabled. This seems bad.The xpedite boards had a common/fsl_8xxx_ddr.c; with this
change only the 517 board uses this so I have moved the ddr code
into that board's directory in xpedite517x.cSigned-off-by: Becky Bruce
Tested-by: Paul Gortmaker
Signed-off-by: Kumar Gala -
Use new is_serdes_configured to determine if TSECs are in SGMII mode and
report that on the various boards that use or can be configured in SGMII
mode in board_eth_init() instead of in the PCI init code.Signed-off-by: Kumar Gala
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Now that we have serdes support for all 85xx/86xx/Pxxx chips we can
replace the is_fsl_pci_cfg() code with the is_serdes_configured().Signed-off-by: Kumar Gala
18 Nov, 2010
1 commit
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Before this commit, weak symbols were not overridden by non-weak symbols
found in archive libraries when linking with recent versions of
binutils. As stated in the System V ABI, "the link editor does not
extract archive members to resolve undefined weak symbols".This commit changes all Makefiles to use partial linking (ld -r) instead
of creating library archives, which forces all symbols to participate in
linking, allowing non-weak symbols to override weak symbols as intended.
This approach is also used by Linux, from which the gmake function
cmd_link_o_target (defined in config.mk and used in all Makefiles) is
inspired.The name of each former library archive is preserved except for
extensions which change from ".a" to ".o". This commit updates
references accordingly where needed, in particular in some linker
scripts.This commit reveals board configurations that exclude some features but
include source files that depend these disabled features in the build,
resulting in undefined symbols. Known such cases include:
- disabling CMD_NET but not CMD_NFS;
- enabling CONFIG_OF_LIBFDT but not CONFIG_QE.Signed-off-by: Sebastien Carlier
15 Nov, 2010
2 commits
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Previously some mpc85xx boards printed indented messages such as the
following on bootup:
printf(" eTSEC4 is in sgmii mode.\n");
printf(" Serdes2 disalbed\n");The bootup appearance looks cleaner if the indentation is removed which
aligns these messages with other bootup output.Signed-off-by: Peter Tyser
CC: galak@kernel.crashing.org -
Previously boards used a variety of indentations, newline styles, and
colon styles for the PCI information that is printed on bootup. This
patch unifies the style to look like:...
NAND: 1024 MiB
PCIE1: connected as Root Complex
Scanning PCI bus 01
04 01 8086 1010 0200 00
04 01 8086 1010 0200 00
03 00 10b5 8112 0604 00
02 01 10b5 8518 0604 00
02 02 10b5 8518 0604 00
08 00 1957 0040 0b20 00
07 00 10b5 8518 0604 00
09 00 10b5 8112 0604 00
07 01 10b5 8518 0604 00
07 02 10b5 8518 0604 00
06 00 10b5 8518 0604 00
02 03 10b5 8518 0604 00
01 00 10b5 8518 0604 00
PCIE1: Bus 00 - 0b
PCIE2: connected as Root Complex
Scanning PCI bus 0d
0d 00 1957 0040 0b20 00
PCIE2: Bus 0c - 0d
In: serial
...Signed-off-by: Peter Tyser
CC: wd@denx.de
CC: sr@denx.de
CC: galak@kernel.crashing.org
19 Oct, 2010
2 commits
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Clean up Makefile, and drop a lot of the config.mk files on the way.
We now also automatically pick all boards that are listed in
boards.cfg (and with all configurations), so we can drop the redundant
entries from MAKEALL to avoid building these twice.Signed-off-by: Wolfgang Denk
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The change is currently needed to be able to remove the board
configuration scripting from the top level Makefile and replace it by
a simple, table driven script.Moving this configuration setting into the "CONFIG_*" name space is
also desirable because it is needed if we ever should move forward to
a Kconfig driven configuration system.Signed-off-by: Wolfgang Denk
20 Jul, 2010
1 commit
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Previously we used an alias the pci node to determine which node to
fixup or delete. Now we use the new fdt_node_offset_by_compat_reg to
find the node to update.Additionally, we replace the code in each board with a single macro call
that makes assumes uniform naming and reduces duplication in this area.Signed-off-by: Kumar Gala
16 Jul, 2010
1 commit
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Currently, 83xx, 86xx, and 85xx have a lot of duplicated code
dedicated to defining and manipulating the LBC registers. Merge
this into a single spot.To do this, we have to decide on a common name for the data structure
that holds the lbc registers - it will now be known as fsl_lbc_t, and we
adopt a common name for the immap layouts that include the lbc - this was
previously known as either im_lbc or lbus; use the former.In addition, create accessors for the BR/OR regs that use in/out_be32
and use those instead of the mismash of access methods currently in play.I have done a successful ppc build all and tested a board or two from
each processor family.Signed-off-by: Becky Bruce
Acked-by: Kim Phillips
Signed-off-by: Kumar Gala
07 Apr, 2010
1 commit
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Refactor and document the Freescale PIXIS code, used on most 85xx and 86xx
boards. This makes the code easier to read and more flexible.Delete pixis.h, because none of the exported functions were actually being
used by any other file. Make all of the functions in pixis.c 'static'.
Remove "#include pixis.h" from every file that has it.Remove some unnecessary #includes.
Make 'pixis_base' into a macro, so that we don't need to define it in every
function.Add "while(1);" loops at the end of functions that reset the board, so that
execution doesn't continue while the reset is in progress.Replace in_8/out_8 calls with clrbits_8, setbits_8, or clrsetbits_8, where
appropriate.Replace ulong/uint with their spelled-out equivalents. Remove unnecessary
typecasts, changing the types of some variables if necessary.Add CONFIG_SYS_PIXIS_VCFGEN0_ENABLE and CONFIG_SYS_PIXIS_VBOOT_ENABLE to make
it easier for specific boards to support variations in the PIXIS registers
sets. No current boards appears to need this feature.Fix the definition of CONFIG_SYS_PIXIS_VBOOT_MASK for the MPC8610 HPCD.
Apparently, "pixis_reset altbank" has never worked on this board.Signed-off-by: Timur Tabi
Signed-off-by: Kumar Gala
18 Jan, 2010
1 commit
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When referring to PCIe and USB 'endpoint' is the standard naming
convention.Signed-off-by: Peter Tyser
Acked-by: Stefan Roese
Acked-by: Remy Bohmer
06 Jan, 2010
1 commit
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Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.Signed-off-by: Kumar Gala
25 Sep, 2009
1 commit
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On 85xx platforms we shouldn't be using any LAWAR_* defines
but using the LAW_* ones provided by fsl-law.h. Rename any such
uses and limit the LAWAR_ to the 83xx platform as the only user so
we will get compile errors in the future.Signed-off-by: Kumar Gala
08 Sep, 2009
1 commit
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Refactor the code into a simple bitmask lookup table that determines if
a given PCI controller is enabled and if its in host/root-complex or
agent/end-point mode.Each processor in the PQ3/MPC86xx family specified different encodings
for the cfg_host_agt[] and cfg_IO_ports[] boot strapping signals.Signed-off-by: Kumar Gala
29 Aug, 2009
4 commits
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There are really no differences between all the 85xx linker scripts so
we can just move to a single common one. Board code is still able to
override the common one if need be.Signed-off-by: Kumar Gala
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For historic reasons we had defined some additional PLATFORM_CPPFLAGS
like:PLATFORM_CPPFLAGS += -DCONFIG_E500=1
PLATFORM_CPPFLAGS += -DCONFIG_MPC85xx=1
PLATFORM_CPPFLAGS += -DCONFIG_MPC8548=1However these are all captured in the config.h and thus redudant.
Signed-off-by: Kumar Gala
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Every platform that calls fsl_pci_init calls fsl_pci_setup_inbound_windows
before it calls fsl_pci_init. There isn't any reason to just call it
from fsl_pci_init and simplify things a bit.Signed-off-by: Kumar Gala
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Every platform that calls fsl_pci_init calls pci_setup_indirect before
it calls fsl_pci_init. There isn't any reason to just call it from
fsl_pci_init and simplify things a bit.Signed-off-by: Kumar Gala
22 Jul, 2009
2 commits
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The pixis code used in8/out8 all over the place. Replace it with
in_8/out_8 macros.Signed-off-by: Kumar Gala
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The p2020DS, MPC8536DS, MPC8572DS, MPC8544DS boards are capable of
swizzling the upper address bits of the NOR flash we boot out of which
creates the concept of "virtual" banks. This is useful in that we can
flash a test of image of u-boot and reset to one of the virtual banks
while still maintaining a working image in "bank 0".The PIXIS FPGA exposes registers on LBC which we can use to determine
which "bank" we are booting out of (as well as setting which bank to
boot out of).Signed-off-by: Kumar Gala