12 Feb, 2019

1 commit

  • Add a common iMX MU driver in misc uclass to communicate with M4.
    The MU message format is defined to use 4 words as below, the driver
    will use all 4 TR/RR in MU to pass one message

    |WORD 0 | WORD 1 | WORD 2 | WORD 3 |
    |SEQ | TYPE | PAYLOAD ADDRESS | PAYLOAD LENGTH |

    - SEQ:
    A sequence id starts from 0 and increases for each request message

    - TYPE:
    0x1: Request. Message sent from AP will set to this value.
    0x2: Response. Message responded from M4 set to this value.
    0x3: MU A side is ready.
    0x4: MU B side is ready.

    - PAYLOAD ADDRESS:
    A pointer to the memory address where the uplayer message is stored

    - PAYLOAD LENGTH:
    The uplayer message length

    Signed-off-by: Ye Li
    (cherry picked from commit aba0e51cc397e1d98be950f9c15619de06ebf782)

    Ye Li
     

11 Jan, 2018

1 commit

  • This patch adds changes necessary to move functionality present in
    PowerPC folders with ARM architectures that have DPAA1 QBMan hardware

    - Create new board/freescale/common/fsl_portals.c to house shared
    device tree fixups for DPAA1 devices with ARM and PowerPC cores
    - Add new header file to top includes directory to allow files in
    both architectures to grab the function prototypes
    - Port inhibit_portals() from PowerPC to ARM. This function is used in
    setup to disable interrupts on all QMan and BMan portals. It is
    needed because the interrupts are enabled by default for all portals
    including unused/uninitialised portals. When the kernel attempts to
    go to deep sleep the unused portals prevent it from doing so

    Signed-off-by: Ahmed Mansour
    Reviewed-by: York Sun

    Ahmed Mansour
     

22 Sep, 2017

1 commit

  • This patch adds the support of reset and clock control
    block (rcc) found on STM32 SoCs.
    This driver is similar to a MFD linux driver.

    This driver supports currently STM32H7 only.
    STM32F4 and STM32F7 will be migrated to this rcc MFD driver
    in the future to uniformize all STM32 SoCs already upstreamed.

    Signed-off-by: Christophe Kerello
    Signed-off-by: Patrice Chotard
    Reviewed-by: Vikas Manocha
    Reviewed-by: Simon Glass

    Christophe Kerello
     

12 Sep, 2017

1 commit


12 Jul, 2017

1 commit

  • This module can be found on the Turris Omnia board connected
    via the I2C interface.

    Among some cryptographic functions, the chip has a 512 bit
    One Time Programmable memory, 88 byte configuration memory
    and 512 byte general purpose memory.

    The Turris Omnia stores serial number and device MAC address in
    the OTP memory.

    This commit adds basic support for reading the EEPROM and also
    exposes the chips Random Number Generator.

    The driver is based on code by
    Josh Datko, Cryptotronix, jbd@cryptotronix.com
    and also
    Tomas Hlavacek, CZ.NIC, tomas.hlavacek@nic.cz

    Signed-off-by: Tomas Hlavacek
    Signed-off-by: Marek Behun

    create mode 100644 drivers/misc/atsha204a-i2c.c
    create mode 100644 include/atsha204a-i2c.h
    Signed-off-by: Stefan Roese

    Marek Behún
     

07 Jun, 2017

1 commit

  • This adds a simple driver for reading the efuse block of the RK3399.
    It should be easy enough to add drivers for other devices (e.g. the
    RK3328, RK3368, etc.) by passing the device details via driver_data.

    Unlike the kernel driver (using the nvmem subsystem), we don't expose
    the efuse as multiple named cells, but rather as a linear memory that
    can be read using misc_read(...).

    The primary use case (as of today) is the generation of a 'serial#'
    (and a 'cpuid#') environment variable for the RK3399-Q7 (Puma)
    system-on-module.

    Note that this adds a debug-only (i.e. only if DEBUG is defined)
    command 'rk3399_dump_efuses' that dumps the efuse block's content.
    N.B.: The name 'rk3399_dump_efuses' was intentionally chosen to
    include a SoC-name (together with a comment in the function) to
    remind whoever adds support for additional SoCs that this
    function currently makes assumptions regarding the size of the
    fuse-box based on the RK3399. The hope is that the function is
    adjusted to reflect any changes resulting from generalising the
    driver for multiple SoCs and is then renamed.

    Signed-off-by: Philipp Tomsich

    Reviewed-by: Simon Glass

    Philipp Tomsich
     

01 May, 2017

1 commit


22 Jan, 2017

1 commit

  • Move all of the status LED feature to drivers/led/Kconfig.
    The LED status definitions were moved from the board configuration
    files to the defconfig files.

    TBD: Move all of the definitions in the include/status_led.h to the
    relevant board's defconfig files.

    Tested boards: CL-SOM-AM57x, CM-T335

    Signed-off-by: Uri Mashiach

    Uri Mashiach
     

28 Sep, 2016

1 commit

  • The Tegra CAR (Clock And Reset) module provides control of most clocks
    and reset signals within the Tegra SoC. This change implements a driver
    for this module. However, since the module implements multiple kinds of
    services (clocks, resets, perhaps more), all this driver does is bind
    various sub-devices, which in turn provide the real services. This driver
    is essentially an "MFD" (Multi-Function Device) in Linux kernel speak.

    Signed-off-by: Stephen Warren
    Signed-off-by: Tom Warren

    Stephen Warren
     

15 Sep, 2016

1 commit


16 Aug, 2016

2 commits

  • This simple driver provides some functions to control some of the
    integrated devices. The watchdog is enabled per default. This driver
    adds a function to disable the watchdog. Also the internal legacy
    UART (io address 0x3f8/0x2f8) is enabled per default.

    Signed-off-by: Stefan Roese
    Reviewed-by: Bin Meng
    Cc: Simon Glass

    Stefan Roese
     
  • The Tegra BPMP (Boot and Power Management Processor) is a separate
    auxiliary CPU embedded into Tegra to perform power management work, and
    controls related features such as clocks, resets, power domains, PMIC I2C
    bus, etc. This driver provides the core low-level communication path by
    which feature-specific drivers (such as clock) can make requests to the
    BPMP. This driver is similar to an MFD driver in the Linux kernel. It is
    unconditionally selected by CONFIG_TEGRA186 since virtually any Tegra186
    build of U-Boot will need the feature.

    Signed-off-by: Stephen Warren
    Reviewed-by: Simon Glass
    Signed-off-by: Tom Warren

    Stephen Warren
     

12 Aug, 2016

1 commit


15 Jul, 2016

2 commits


27 May, 2016

1 commit

  • The current reset API implements a method to reset the entire system.
    In the near future, I'd like to introduce code that implements the device
    tree reset bindings; i.e. the equivalent of the Linux kernel's reset API.
    This controls resets to individual HW blocks or external chips with reset
    signals. It doesn't make sense to merge the two APIs into one since they
    have different semantic purposes. Resolve the naming conflict by renaming
    the existing reset API to sysreset instead, so the new reset API can be
    called just reset.

    Signed-off-by: Stephen Warren
    Acked-by: Simon Glass

    Stephen Warren
     

23 May, 2016

2 commits


15 Mar, 2016

1 commit

  • There are already two FIT options in Kconfig but the CONFIG options are
    still in the header files. We need to do a proper move to fix this.

    Move these options to Kconfig and tidy up board configuration:

    CONFIG_FIT
    CONFIG_OF_BOARD_SETUP
    CONFIG_OF_SYSTEM_SETUP
    CONFIG_FIT_SIGNATURE
    CONFIG_FIT_BEST_MATCH
    CONFIG_FIT_VERBOSE
    CONFIG_OF_STDOUT_VIA_ALIAS
    CONFIG_RSA

    Unfortunately the first one is a little complicated. We need to make sure
    this option is not enabled in SPL by this change. Also this option is
    enabled automatically in the host builds by defining CONFIG_FIT in the
    image.h file. To solve this, add a new IMAGE_USE_FIT #define which can
    be used in files that are built on the host but must also build for U-Boot
    and SPL.

    Note: Masahiro's moveconfig.py script is amazing.

    Signed-off-by: Simon Glass
    [trini: Add microblaze change, various configs/ re-applies]
    Signed-off-by: Tom Rini

    Simon Glass
     

21 Feb, 2016

1 commit

  • The SMSC SIO1007 superio chipset integrates two ns16550 compatible
    serial ports for legacy applications, 16 GPIO pins and some other
    functionalities like power management.

    This adds a simple driver to enable serial port and handle GPIO.

    Signed-off-by: Bin Meng
    Reviewed-by: Simon Glass

    Bin Meng
     

28 Jan, 2016

1 commit


22 Jan, 2016

2 commits


23 Oct, 2015

2 commits


02 Sep, 2015

1 commit

  • DEVDISRn registers provides a mechanism for gating clocks of IP blocks
    that are not used. Here we implement hwconfig option to allow users
    to disable unused peripherals on the board.

    For ex. If eSDHC/qDMA/eDMA are unused and with disabled status in dts,
    User can enable CONFIG_FSL_DEVICE_DISABLE and set "devdis:esdhc,qdma,edma"
    in hwconfig, thus ESDHC controller & eDMA/qDMA will be clock gated to
    save more power.

    Signed-off-by: Zhuoyu Zhang
    Reviewed-by: York Sun

    Zhuoyu Zhang
     

22 Jul, 2015

3 commits

  • Add a test to confirm that we can access system controllers and find their
    driver data.

    Signed-off-by: Simon Glass

    Simon Glass
     
  • Add drivers for sandbox. One can only perform a warm reset (which does
    nothing). The other can perform a cold reset or a power reset (the
    latter will quit U-Boot). These can be used for testing the reset uclass.

    Signed-off-by: Simon Glass

    Simon Glass
     
  • It is common for system reset to be available at multiple levels in modern
    hardware. For example, an SoC may provide a reset option, and a board may
    provide its own reset for reasons of security or thoroughness. It is useful
    to be able to model this hardware without hard-coding the behaviour in the
    SoC or board. Also there is a distinction sometimes between resetting just
    the CPU (leaving GPIO state alone) and resetting all the PMICs, just cutting
    power.

    To achieve this, add a simple system reset uclass. It allows multiple devices
    to provide reset functionality and provides a way to walk through them,
    requesting a particular reset type until is it provided.

    Signed-off-by: Simon Glass

    Simon Glass
     

09 May, 2015

1 commit


22 Apr, 2015

1 commit

  • The Debug Server driver is responsible for loading the Debug
    server FW on the Service Processor (Cortex-A5 core) on LS2085A like
    SoCs and then polling for the successful initialization of the same.
    TOP MEM HIDE is adjusted to ensure the space required by Debug Server
    FW is accounted for. MC uses the DDR area which is calculated as:

    MC DDR region start = Top of DDR - area reserved by Debug Server FW

    Signed-off-by: Bhupesh Sharma
    Reviewed-by: York Sun

    Bhupesh Sharma
     

19 Apr, 2015

1 commit


06 Mar, 2015

1 commit

  • The Security Monitor is the SOC’s central reporting point for
    security-relevant events such as the success or failure of boot
    software validation and the detection of potential security compromises.

    The API's for transition of Security states have been added
    which will be used in case of SECURE BOOT.

    Signed-off-by: Ruchika Gupta
    Signed-off-by: Gaurav Rana
    Reviewed-by: York Sun

    gaurav rana
     

14 Dec, 2014

1 commit


12 Dec, 2014

2 commits

  • There seem to be a few EEPROM drivers around - perhaps we should have a
    single standard one? This simple driver is used for sandbox testing, but
    could be pressed into more active service.

    Signed-off-by: Simon Glass
    Acked-by: Heiko Schocher
    Reviewed-by: Masahiro Yamada

    Simon Glass
     
  • To enable testing of I2C, add a simple I2C EEPROM simulator for sandbox.
    It supports reading and writing from a small data store.

    Signed-off-by: Simon Glass
    Acked-by: Heiko Schocher
    Reviewed-by: Masahiro Yamada

    Simon Glass
     

04 Apr, 2014

1 commit


01 Apr, 2014

1 commit

  • Add yet another OCOTP driver for this i.MX family. This time, it's a driver for
    the OCOTP variant found in the i.MX23 and i.MX28. This version of OCOTP is too
    different from the i.MX6 one that I could not use the mxc_ocotp.c driver without
    making it into a big pile of #ifdef . This driver implements the regular fuse
    command interface, but due to the IP blocks' limitation, we support only READ
    and PROG functions.

    Signed-off-by: Marek Vasut
    Cc: Stefano Babic

    Marek Vasut
     

18 Mar, 2014

1 commit


26 Nov, 2013

1 commit