22 May, 2013

1 commit


08 May, 2013

4 commits

  • The definitions are not used anywhere else, and merging it will
    make adding the new USB definitions for XLPII series easier.
    While there, cleanup some whitespace in usb-init.c. There is no
    change to logic due to this commit.

    Signed-off-by: Jayachandran C
    Patchwork: http://patchwork.linux-mips.org/patch/5027/
    Acked-by: John Crispin

    Jayachandran C
     
  • This enables us to have a default device tree per SoC family to be built
    into the kernel. The default device tree for XLP3xx has been added as part
    of this change. Later this can be used to provide support default boards
    for XLP2xx and XLP9xx SoCs.

    Kconfig options are provided for each default device tree so that just the
    needed ones can be selected to be built into the kernel.

    Signed-off-by: Jayachandran C
    Patchwork: http://patchwork.linux-mips.org/patch/5023/
    Acked-by: John Crispin

    Jayachandran C
     
  • The index for a device interrupt in the PIC interrupt routing table
    changes for different chips in the XLP family. Avoid using the fixed
    entries and derive the index value from the SoC device header.

    Add workarounds for some devices which do not report the IRT index
    correctly.

    Signed-off-by: Jayachandran C
    Patchwork: http://patchwork.linux-mips.org/patch/5025/
    Acked-by: John Crispin

    Jayachandran C
     
  • Use standard function to print cpumask. Also fixup the name of the
    variable used and make it static.

    Signed-off-by: Jayachandran C
    Patchwork: http://patchwork.linux-mips.org/patch/5024/
    Acked-by: John Crispin

    Jayachandran C
     

21 Feb, 2013

1 commit


17 Feb, 2013

6 commits

  • On multi-chip boards, the first core on slave SoCs may take much
    more time to wakeup. Add code to wait for the core to come up before
    proceeding with the rest of the boot up.

    Update xlp_wakeup_core to also skip the boot node and the boot CPU
    initialization which is already complete.

    Signed-off-by: Jayachandran C
    Patchwork: http://patchwork.linux-mips.org/patch/4783/
    Signed-off-by: John Crispin

    Jayachandran C
     
  • Doing calibrate delay on a hardware thread will be inaccurate since
    it depends on the load on other threads in the core. It will also
    slow down the boot process when done for 128 hardware threads. Switch
    to a pre-computed loops per jiffy based on the core frequency. The
    value is computed based on the core frequency and roughly matches the
    value calculated by calibrate_delay().

    Signed-off-by: Jayachandran C
    Patchwork: http://patchwork.linux-mips.org/patch/4791/
    Signed-off-by: John Crispin

    Jayachandran C
     
  • The XLR/XLS/XLP PIC has a 8 countdown timers which run at the PIC
    frequencey. One of these can be used as a clocksource to provide
    timestamps that is common across cores. This can be used in place
    of the count/compare clocksource which is per-CPU.

    On XLR/XLS PIC registers are 32-bit, so we just use the lower 32-bits
    of the PIC counter. On XLP, the whole 64-bit can be used.

    Provide common macros and functions for PIC timer registers on XLR/XLS
    and XLP, and use them to register a PIC clocksource.

    Signed-off-by: Jayachandran C
    Patchwork: http://patchwork.linux-mips.org/patch/4786/
    Signed-off-by: John Crispin

    Jayachandran C
     
  • Since we now use r4k cache code for Netlogic XLP, it is
    better to split L1 icache among the active threads, so that
    threads won't step on each other while flushing icache.

    The L1 dcache is already split among the threads in the core.

    Signed-off-by: Jayachandran C
    Patchwork: http://patchwork.linux-mips.org/patch/4787/
    Signed-off-by: John Crispin

    Jayachandran C
     
  • Provide functions ack_c0_eirr(), set_c0_eimr(), clear_c0_eimr()
    and read_c0_eirr_and_eimr() that do the EIMR and EIRR operations
    and update the interrupt handling code to use these functions.
    Also, use the EIMR register functions to mask interrupts in the
    irq code.

    The 64-bit interrupt request and mask registers (EIRR and EIMR) are
    accessed when the interrupts are off, and the common operations are
    to set or clear a bit in these registers. Using the 64-bit c0 access
    functions for these operations is not optimal in 32-bit, because it
    will disable/restore interrupts and split/join the 64-bit value during
    each register access.

    Signed-off-by: Jayachandran C
    Patchwork: http://patchwork.linux-mips.org/patch/4790/
    Signed-off-by: John Crispin

    Jayachandran C
     
  • Add support for XLS6xx CPUs to the Fast Message Network (FMN)
    configuration.

    Signed-off-by: Jayachandran C
    Patchwork: http://patchwork.linux-mips.org/patch/4785/
    Signed-off-by: John Crispin

    Jayachandran C
     

01 Feb, 2013

1 commit

  • Having received another series of whitespace patches I decided to do this
    once and for all rather than dealing with this kind of patches trickling
    in forever.

    Signed-off-by: Ralf Baechle

    Ralf Baechle
     

31 Jan, 2013

1 commit

  • The commit 2a37b1a "MIPS: Netlogic: Move from u32 cpumask to cpumask_t"
    breaks uniprocessor compilation on XLR with:

    arch/mips/netlogic/xlr/setup.c: In function 'prom_init':
    arch/mips/netlogic/xlr/setup.c:196:6: error: unused variable 'i'

    Fix by defining 'i' only when CONFIG_SMP is defined.

    Signed-off-by: Jayachandran C
    Patchwork: http://patchwork.linux-mips.org/patch/4760/
    Signed-off-by: John Crispin
    Signed-off-by: Ralf Baechle

    Jayachandran C
     

15 Dec, 2012

1 commit

  • Pull MIPS updates from Ralf Baechle:
    "The MIPS bits for 3.8. This also includes a bunch fixes that were
    sitting in the linux-mips.org git tree for a long time. This pull
    request contains updates to several OCTEON drivers and the board
    support code for BCM47XX, BCM63XX, XLP, XLR, XLS, lantiq, Loongson1B,
    updates to the SSB bus support, MIPS kexec code and adds support for
    kdump.

    When pulling this, there are two expected merge conflicts in
    include/linux/bcma/bcma_driver_chipcommon.h which are trivial to
    resolve, just remove the conflict markers and keep both alternatives."

    * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (90 commits)
    MIPS: PMC-Sierra Yosemite: Remove support.
    VIDEO: Newport Fix console crashes
    MIPS: wrppmc: Fix build of PCI code.
    MIPS: IP22/IP28: Fix build of EISA code.
    MIPS: RB532: Fix build of prom code.
    MIPS: PowerTV: Fix build.
    MIPS: IP27: Correct fucked grammar in ops-bridge.c
    MIPS: Highmem: Fix build error if CONFIG_DEBUG_HIGHMEM is disabled
    MIPS: Fix potencial corruption
    MIPS: Fix for warning from FPU emulation code
    MIPS: Handle COP3 Unusable exception as COP1X for FP emulation
    MIPS: Fix poweroff failure when HOTPLUG_CPU configured.
    MIPS: MT: Fix build with CONFIG_UIDGID_STRICT_TYPE_CHECKS=y
    MIPS: Remove unused smvp.h
    MIPS/EDAC: Improve OCTEON EDAC support.
    MIPS: OCTEON: Add definitions for OCTEON memory contoller registers.
    MIPS: OCTEON: Add OCTEON family definitions to octeon-model.h
    ata: pata_octeon_cf: Use correct byte order for DMA in when built little-endian.
    MIPS/OCTEON/ata: Convert pata_octeon_cf.c to use device tree.
    MIPS: Remove usage of CEVT_R4K_LIB config option.
    ...

    Linus Torvalds
     

12 Dec, 2012

1 commit

  • Pull USB patches from Greg Kroah-Hartman:
    "Here's the big set of USB patches for 3.8-rc1.

    Lots of USB host driver cleanups in here, and a bit of a reorg of the
    EHCI driver to make it easier for the different EHCI platform drivers
    to all work together nicer, which was a reduction in overall code. We
    also deleted some unused firmware files, and got rid of the very old
    file_storage usb gadget driver that had been broken for a long time.
    This means we ended up removing way more code than added, always a
    nice thing to see:
    310 files changed, 3028 insertions(+), 10754 deletions(-)

    Other than that, the usual set of new device ids, driver fixes, gadget
    driver and controller updates and the like.

    All of these have been in the linux-next tree for a number of weeks.

    Signed-off-by: Greg Kroah-Hartman "

    * tag 'usb-3.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (228 commits)
    USB: mark uas driver as BROKEN
    xhci: Add Lynx Point LP to list of Intel switchable hosts
    uwb: fix uwb_dev_unlock() missed at an error path in uwb_rc_cmd_async()
    USB: ftdi_sio: Add support for Newport AGILIS motor drivers
    MAINTAINERS: remove drivers/block/ub.c
    USB: chipidea: fix use after free bug
    ezusb: add dependency to USB
    usb: ftdi_sio: fixup BeagleBone A5+ quirk
    USB: cp210x: add Virtenio Preon32 device id
    usb: storage: remove redundant memset() in usb_probe_stor1()
    USB: option: blacklist network interface on Huawei E173
    USB: OHCI: workaround for hardware bug: retired TDs not added to the Done Queue
    USB: add new zte 3g-dongle's pid to option.c
    USB: opticon: switch to generic read implementation
    USB: opticon: refactor reab-urb processing
    USB: opticon: use usb-serial bulk-in urb
    USB: opticon: increase bulk-in size
    USB: opticon: use port as urb context
    USB: opticon: pass port to get_serial_info
    USB: opticon: make private data port specific
    ...

    Linus Torvalds
     

01 Dec, 2012

1 commit

  • All architectures that use cmd_dtc do so in almost the same way. Create
    a central build rule to avoid duplication. The one difference is that
    most current uses of dtc build $(obj)/%.dtb from $(src)/dts/%.dts rather
    than building the .dtb in the same directory as the .dts file. This
    difference will be eliminated arch-by-arch in future patches.

    MIPS is the exception here; it already uses the exact same rule as the
    new common rule, so the duplicate is removed in this patch to avoid any
    conflict. arch/mips changes courtesy of Ralf Baechle.

    Update Documentation/kbuild to remove the explicit call to cmd_dtc from
    the example, now that the rule exists in a centralized location.

    Cc: Arnd Bergmann
    Cc: linux-arm-kernel@lists.infradead.org
    Cc: Olof Johansson
    Cc: Russell King
    Acked-by: Catalin Marinas
    Cc: Jonas Bonn
    Cc: linux@lists.openrisc.net
    Cc: Aurelien Jacquiot
    Cc: linux-c6x-dev@linux-c6x.org
    Cc: Mark Salter
    Cc: Michal Simek
    Cc: microblaze-uclinux@itee.uq.edu.au
    Cc: Chris Zankel
    Cc: linux-xtensa@linux-xtensa.org
    Cc: Max Filippov
    Signed-off-by: Ralf Baechle
    Signed-off-by: Stephen Warren
    Signed-off-by: Rob Herring

    Stephen Warren
     

09 Nov, 2012

8 commits

  • On XLR/XLS, the cpu cores communicate with fast on-chip devices
    (e.g. network accelerator, security engine etc.) using the Fast
    Messaging Network(FMN). The FMN queues and credits needs to be
    configured and intialized before it can be used.

    The co-processor 2 on XLR/XLS CPU cores has registers for FMN access,
    and the XLR/XLS has custom instructions for sending and loading
    messages. The FMN can deliver also per-cpu interrupts when messages
    are available at the CPU.

    This patch adds FMN initialization, adds interrupt setup and handling,
    and also provides support for sending and receiving FMN messages.

    Signed-off-by: Ganesan Ramalingam
    Signed-off-by: Jayachandran C
    Patchwork: http://patchwork.linux-mips.org/patch/4468
    Signed-off-by: John Crispin

    Ganesan Ramalingam
     
  • Create struct nlm_pic_irq for interrupts handled by the PIC.
    This simplifies IRQ handling for multi-SoC as well as
    the single SoC cases. Also split the setup of percpu and PIC
    interrupts so that we can configure the PIC interrupts for
    every node.

    Signed-off-by: Jayachandran C
    Patchwork: http://patchwork.linux-mips.org/patch/4467
    Signed-off-by: John Crispin

    Jayachandran C
     
  • There can be 1, 2 or 4 SoCs(nodes) in a multi-chip XLP board. Add an
    option for multi-chip boards in case of XLP, and make the number of
    nodes configurable.

    Signed-off-by: Jayachandran C
    Patchwork: http://patchwork.linux-mips.org/patch/4470
    Signed-off-by: John Crispin

    Jayachandran C
     
  • Upto 4 Netlogic XLP SoCs can be connected over ICI links to form a
    coherent multi-node system. Each SoC has its own set of on-chip
    devices including PIC. To support this, add a per SoC stucture and
    use it for the PIC and SYS block addresses instead of using global
    variables.

    Signed-off-by: Jayachandran C
    Patchwork: http://patchwork.linux-mips.org/patch/4469
    Signed-off-by: John Crispin

    Jayachandran C
     
  • Initial code to support more than 32 cpus. The platform CPU mask
    is updated from 32-bit mask to cpumask_t. Convert places that use
    cpu_/cpus_ functions to use cpumask_* functions.

    Signed-off-by: Jayachandran C
    Patchwork: http://patchwork.linux-mips.org/patch/4464
    Signed-off-by: John Crispin

    Jayachandran C
     
  • The cpuid was not passed into early_init_secondary even though the
    comment indicated that it will be. Fix this.

    Signed-off-by: Jayachandran C
    Patchwork: http://patchwork.linux-mips.org/patch/4458
    Signed-off-by: John Crispin

    Jayachandran C
     
  • At this point early printk is available, so debugging device tree
    issues is easier.

    Signed-off-by: Jayachandran C
    Patchwork: http://patchwork.linux-mips.org/patch/4460
    Signed-off-by: John Crispin

    Jayachandran C
     
  • Enable Speculative Unmap Enable bit, which will enable speculative L2
    cache requests for unmapped memory. This should give better performance
    for kernel code/data which is in KSEG0

    Signed-off-by: Jayachandran C
    Patchwork: http://patchwork.linux-mips.org/patch/4461
    Signed-off-by: John Crispin

    Jayachandran C
     

23 Oct, 2012

2 commits


23 Aug, 2012

4 commits


25 Jul, 2012

3 commits


24 Jul, 2012

6 commits

  • Probe and add devices on SoC "simple-bus" on startup. This will
    in turn add devices like I2C controller that are specified in the
    device tree under 'soc'.

    Signed-off-by: Ganesan Ramalingam
    Signed-off-by: Jayachandran C
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/3762/
    Signed-off-by: Ralf Baechle

    Ganesan Ramalingam
     
  • Add IRT to IRQ translation for the MMC and I2C IRQs.

    Signed-off-by: Jayachandran C
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/3761/
    Signed-off-by: Ralf Baechle

    Jayachandran C
     
  • The XLP USB controller appears as a device on the internal SoC PCIe
    bus, the block has 2 EHCI blocks and 4 OHCI blocks. Change are to:

    * Add files netlogic/xlp/usb-init.c and asm/netlogic/xlp-hal/usb.h
    to initialize the USB controller and define PCI fixups. The PCI
    fixups are to setup interrupts and DMA mask.
    * Update include/asm/xlp-hal/{iomap.h,pic.h,xlp.h} to add interrupt
    mapping for EHCI/OHCI interrupts.

    Signed-off-by: Ganesan Ramalingam
    Signed-off-by: Jayachandran C
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/3756/
    Signed-off-by: Ralf Baechle

    Ganesan Ramalingam
     
  • Adds support for the XLP on-chip PCIe controller. On XLP, the
    on-chip devices(including the 4 PCIe links) appear in the PCIe
    configuration space of the XLP as PCI devices.

    The changes are to initialize and register the PCIe controller,
    enable hardware byte swap in the PCIe IO and MEM space, and to
    enable PCIe interrupts.

    Signed-off-by: Ganesan Ramalingam
    Signed-off-by: Jayachandran C
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/3760/
    Patchwork: https://patchwork.linux-mips.org/patch/4104/
    Signed-off-by: Ralf Baechle

    Ganesan Ramalingam
     
  • Add platform code for XLR/XLS I2C controller and devices. Add
    devices on the I2C bus on the XLR/XLS developement boards.

    Signed-off-by: Jayachandran C
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/3757/
    Signed-off-by: Ralf Baechle

    Jayachandran C
     
  • Changes to add support for the boot NOR flash on XLR boards and the
    boot NAND/NOR flash drivers on the XLS boards.

    Signed-off-by: Ganesan Ramalingam
    Signed-off-by: Jayachandran C
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/3758/
    Signed-off-by: Ralf Baechle

    Ganesan Ramalingam