Eric Lee / linux-smarc-t335x-v3.2

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Commit ae25144ed1b608a16c69c5cf1c37e7c5ff7e210d

Authored by Hebbar Gururaja
1 parent 042c58a03f
Exists in v3.2_SMARCT335xPSP_04.06.00.11 and in 3 other branches v3.2_AM335xPSP_04.06.00.11, v3.2_NEWT335xPSP_04.06.00.11, v3.2_SBC_SMARTMEN

Revert "ARM: OMAP: AM33XX: Add OPP table for PG2.1 AM335x" 

This reverts commit ee9dfd8d729d3e7b5ce9e404a0e87f27f6f79135.

This patch checks for the package type for checking the supported opp
bits & also if the bits are set, the opp table is updated.
However, checking package type bit is not required & also, the opp bit
checking must be reversed.

A fix for the same will follow after this commit

Showing 1 changed file with 4 additions and 123 deletions Side-by-side Diff

arch/arm/mach-omap2/opp3xxx_data.c
Diff comments   View file @ ae25144
... ... @@ -18,7 +18,6 @@
18 18 * GNU General Public License for more details.
19 19 */
20 20 #include <linux/module.h>
21   -#include <linux/io.h>
22 21  
23 22 #include <plat/cpu.h>
24 23  
25 24  
... ... @@ -198,72 +197,12 @@
198 197 AM33XX_ES2_0_VDD_MPU_OPPNITRO_UV),
199 198 };
200 199  
201   -#define AM33XX_ES2_1_VDD_MPU_OPP50_UV 950000
202   -#define AM33XX_ES2_1_VDD_MPU_OPP100_UV 1100000
203   -#define AM33XX_ES2_1_VDD_MPU_OPPTURBO_UV 1260000
204   -#define AM33XX_ES2_1_VDD_MPU_OPPNITRO_UV 1350000
205   -
206   -#define OPP_50_INDEX 0
207   -#define OPP_100_INDEX 1
208   -#define OPP_TURBO_INDEX 2
209   -#define OPP_NITRO_INDEX 3
210   -
211   -
212   -/* From AM335x TRM, SPRUH73H, Section 9.3.50 */
213   -#define AM33XX_EFUSE_SMA_OFFSET 0x7fc
214   -
215   -/*
216   - * Bits [17-16] indicates package type
217   - * 00 - reserved
218   - * 01 - ZCZ
219   - * 10 - ZCE
220   - * 11 - reserved
221   - */
222   -#define PACKAGE_TYPE_MASK 0x3
223   -#define PACKAGE_TYPE_SHFT 16
224   -
225   -#define PACKAGE_TYPE_ZCZ 0x1
226   -#define PACKAGE_TYPE_ZCE 0x2
227   -
228   -/*
229   - * Bits [12:0] are OPP Disabled bits,
230   - * 1 = OPP is disabled and not available,
231   - * 0 = OPP available.
232   - */
233   -#define MAX_FREQ_MASK 0x1fff
234   -#define MAX_FREQ_SHFT 0
235   -
236   -#define OPP_50_300MHZ_ZCZ_BIT 4
237   -#define OPP_100_600MHZ_ZCZ_BIT 6
238   -#define OPP_TURBO_800MHZ_ZCZ_BIT 8
239   -#define OPP_NITRO_1GHZ_ZCZ_BIT 9
240   -
241   -#define OPP_50_300MHZ_ZCE_BIT 5
242   -#define OPP_100_600MHZ_ZCE_BIT 6
243   -
244   -
245   -static struct omap_opp_def __initdata am33xx_es2_1_opp_list[] = {
246   - /* MPU OPP1 - OPP50 */
247   - OPP_INITIALIZER("mpu", false, 300000000,
248   - AM33XX_ES2_1_VDD_MPU_OPP50_UV),
249   - /* MPU OPP2 - OPP100 */
250   - OPP_INITIALIZER("mpu", false, 600000000,
251   - AM33XX_ES2_1_VDD_MPU_OPP100_UV),
252   - /* MPU OPP3 - OPPTurbo */
253   - OPP_INITIALIZER("mpu", false, 800000000,
254   - AM33XX_ES2_1_VDD_MPU_OPPTURBO_UV),
255   - /* MPU OPP4 - OPPNitro */
256   - OPP_INITIALIZER("mpu", false, 1000000000,
257   - AM33XX_ES2_1_VDD_MPU_OPPNITRO_UV),
258   -};
259   -
260 200 /**
261 201 * omap3_opp_init() - initialize omap3 opp table
262 202 */
263 203 int __init omap3_opp_init(void)
264 204 {
265 205 int r = -ENODEV;
266   - u32 rev, val, package_type, max_freq;
267 206  
268 207 if (!cpu_is_omap34xx())
269 208 return r;
270 209  
271 210  
272 211  
... ... @@ -272,74 +211,16 @@
272 211 r = omap_init_opp_table(omap36xx_opp_def_list,
273 212 ARRAY_SIZE(omap36xx_opp_def_list));
274 213 else if (cpu_is_am33xx()) {
275   - rev = omap_rev();
276   - switch (rev) {
277   - case AM335X_REV_ES1_0:
  214 + if (omap_rev() == AM335X_REV_ES1_0)
278 215 r = omap_init_opp_table(am33xx_es1_0_opp_def_list,
279 216 ARRAY_SIZE(am33xx_es1_0_opp_def_list));
280   - break;
281   -
282   - case AM335X_REV_ES2_1:
283   - /*
284   - * First read efuse sma reg to detect package type and
285   - * supported frequency
286   - */
287   - val =
288   - readl(AM33XX_CTRL_REGADDR(AM33XX_EFUSE_SMA_OFFSET));
289   -
290   - package_type = (val >> PACKAGE_TYPE_SHFT) &
291   - PACKAGE_TYPE_MASK;
292   - max_freq = val & MAX_FREQ_MASK;
293   -
294   - if (package_type == PACKAGE_TYPE_ZCZ) {
295   - if (max_freq & OPP_50_300MHZ_ZCZ_BIT)
296   - am33xx_es2_1_opp_list[OPP_50_INDEX].
297   - default_available = true;
298   -
299   - if (max_freq & OPP_100_600MHZ_ZCZ_BIT)
300   - am33xx_es2_1_opp_list[OPP_100_INDEX].
301   - default_available = true;
302   -
303   - if (max_freq & OPP_TURBO_800MHZ_ZCZ_BIT)
304   - am33xx_es2_1_opp_list[OPP_TURBO_INDEX].
305   - default_available = true;
306   -
307   - if (max_freq & OPP_NITRO_1GHZ_ZCZ_BIT)
308   - am33xx_es2_1_opp_list[OPP_NITRO_INDEX].
309   - default_available = true;
310   - } else if (package_type == PACKAGE_TYPE_ZCE) {
311   - if (max_freq & OPP_50_300MHZ_ZCE_BIT)
312   - am33xx_es2_1_opp_list[OPP_50_INDEX].
313   - default_available = true;
314   -
315   - if (max_freq & OPP_100_600MHZ_ZCE_BIT)
316   - am33xx_es2_1_opp_list[OPP_100_INDEX].
317   - default_available = true;
318   - } else {
319   - /*
320   - * if package type is not detected fall back to
321   - * PG 2.0 OPP settings
322   - */
323   - r =
324   - omap_init_opp_table(am33xx_es2_0_opp_def_list,
325   - ARRAY_SIZE(am33xx_es2_0_opp_def_list));
326   - break;
327   - }
328   -
329   - r = omap_init_opp_table(am33xx_es2_1_opp_list,
330   - ARRAY_SIZE(am33xx_es2_1_opp_list));
331   - break;
332   -
333   - case AM335X_REV_ES2_0:
334   - /* FALLTHROUGH */
335   - default:
  217 + else
336 218 r = omap_init_opp_table(am33xx_es2_0_opp_def_list,
337 219 ARRAY_SIZE(am33xx_es2_0_opp_def_list));
338   - }
339   - } else {
  220 + }
  221 + else
340 222 r = omap_init_opp_table(omap34xx_opp_def_list,
341 223 ARRAY_SIZE(omap34xx_opp_def_list));
342   - }
343 224  
344 225 return r;
345 226 }