10 Apr, 2019

3 commits

  • Disable typec irq when suspend to avoid the threaded irq to access
    some resource(e.g. i2c over rpmsg) but those resource is not
    available at later phrase, also use IRQ_DISABLE_UNLAZY flag to
    mask the irq on irq chip level when irq happens.

    Suggested-by: Anson Huang
    Acked-by: Peter Chen
    Signed-off-by: Li Jun
    (cherry picked from commit 61869f787fb0ee2f00d0fe9443cb8b487e16e5ec)

    Li Jun
     
  • While system suspend, the typec event handling required service
    maybe is not available(suspended), so we need freeze those event
    handling by using freezable workqueue, e.g while tcpm is handling
    PD message but system suspend started.

    Acked-by: Peter Chen
    Signed-off-by: Li Jun
    (cherry picked from commit 270d4df94b7c2c773a171fe012fb8ce89196964f)

    Li Jun
     
  • We should assign dedicated id for every tcon instance.
    This makes us be able to figure out bewteen master and
    slave tcon. Only side-by-side display mode is likely
    impacted. Based on tests, no functional change is
    observed before or after this patch is applied.

    Signed-off-by: Liu Ying
    (cherry picked from commit e181d9e56b096bbdc919f65b223d1bde413df1bb)

    Liu Ying
     

29 Mar, 2019

4 commits


28 Mar, 2019

6 commits

  • It isn't used out side of the file for now.

    Signed-off-by: Liu Ying
    (cherry picked from commit 13a0d5c3b15e42834b872b0da904f874ff717500)

    Liu Ying
     
  • Due to TKT320590, we are asked to turn TCON into operation mode later after
    the first dumb frame is generated by DPU. This makes DPR/PRG be able to
    evade the frame. However, it turns out we have to set the TCON into operation
    mode first and then wait for Framegen frame counter moving, otherwise, the
    display pipeline cannot be setup correctly sometimes(If pixel combiner is used,
    one of the two display streams is likely broken). This is a mysterious issue.
    So, we've already taken a workaround for the cases where pixel combiner is used.

    It appears that the similar issue is likely to happen for cases where pixel
    combiner is unused. That is to say, if pixel combiner is unused and prefetch
    engine is used, the first atomic flush after the enablement is likely to fail -
    content shadow load irq doesn't come. The sequence which the patch takes is
    the same to the one taken by the previous workaround. Based on tests, it is
    valid for cases with or without pixel combiner.

    Signed-off-by: Liu Ying
    (cherry picked from commit b6126aa9697c77896d2085997eec2a6995509f4b)

    Liu Ying
     
  • To avoid potential division by zero in ipu_init_sync_panel(),
    let's check the rounded_pixel_clk rate prior to that.

    Detected by CoverityScan, CID#56278 ("Division or modulo by zero")

    Signed-off-by: Liu Ying
    (cherry picked from commit 1523150b71f1aa0610f61ea47a9f3bdbcda92522)

    Liu Ying
     
  • To avoid potential division by zero in ipu_init_async_panel(),
    let's check the di_clk rate prior to that.

    Detected by CoverityScan, CID#56264 ("Division or modulo by zero")

    Signed-off-by: Liu Ying
    (cherry picked from commit d7777247e6ba4ca9fcc313bef6672060859fed19)

    Liu Ying
     
  • To avoid potential out of bounds array access on tbl->used[][],
    let's check the tsk->ipu_id prior to that. Based on the context,
    this is what we can do to make the coverity happy.

    Detected by CoverityScan, CID#17689 ("Derefernece before null check")

    Signed-off-by: Liu Ying
    (cherry picked from commit f5dcf709c54da8e64eb84f1dd7a4452ad8d942cf)

    Liu Ying
     
  • The check on !sp_tsk0 is unnecessary in ipu_task_thread(), because the
    beforehand "list_del(&sp_tsk0->node);" within the context implies sp_tsk0
    is not null, otherwise, we'll dereference a null pointer earlier.

    Detected by CoverityScan, CID#17842 ("Logically dead code")

    Signed-off-by: Liu Ying
    (cherry picked from commit 9ad5edd076d61bc8bb3a558e523cc7b31f2c3043)

    Liu Ying
     

27 Mar, 2019

8 commits

  • Because we are re-initializing the proxy at close it might
    happen that work is still pending which causes the following crash:

    [ 94.699835] Unable to handle kernel NULL pointer dereference at virtual address 00000008
    [ 94.707923] Mem abort info:
    [ 94.710722] Exception class = DABT (current EL), IL = 32 bits
    [ 94.716637] SET = 0, FnV = 0
    [ 94.719686] EA = 0, S1PTW = 0
    [ 94.722822] Data abort info:
    [ 94.725698] ISV = 0, ISS = 0x00000005
    [ 94.729530] CM = 0, WnR = 0
    [ 94.732504] user pgtable: 4k pages, 48-bit VAs, pgd = ffff8008d9ba3000
    [ 94.739035] [0000000000000008] *pgd=0000000938419003, *pud=0000000000000000
    [ 94.746015] Internal error: Oops: 96000005 [#1] PREEMPT SMP
    [ 94.751589] Modules linked in:
    [ 94.754652] CPU: 0 PID: 2068 Comm: kworker/0:2 Not tainted 4.14.98-dirty #75
    [ 94.761700] Hardware name: Freescale i.MX8QM MEK (DT)
    [ 94.766768] task: ffff8008f23ae200 task.stack: ffff000014378000
    [ 94.772705] PC is at process_one_work+0x34/0x414
    [ 94.777325] LR is at process_one_work+0x1e0/0x414

    In order to fix this, we make sure that no work is pending before starting
    the re-initialization.

    Signed-off-by: Daniel Baluta
    Reviewed-by: Shengjiu Wang
    (cherry picked from commit 2c00c24be5f8b63636e3f9005e15a3de42058438)

    Daniel Baluta
     
  • Double check that the DTG IRQ STATUS register bit is set when handling
    the vblank and CTXLD kick interrupts to make sure we avoid spurious
    interrupts and kick the CTXLD in a bad moment.

    Signed-off-by: Laurentiu Palcu
    Reviewed-by: Robert Chiras
    (cherry picked from commit cc56e4e07f623d0b831e0f8347f2f3198697ee20)

    Laurentiu Palcu
     
  • Using one completion variable is not feasible as we can hit corner cases like
    enabling and then quickly disabling DCSS where we end up signaling that DTG was
    correctly disabled when, in fact, a VBLANK interrupt was received.

    Signed-off-by: Laurentiu Palcu
    Reviewed-by: Robert Chiras
    (cherry picked from commit 8073e87dce34548bea758c34d3b3557819c75551)

    Laurentiu Palcu
     
  • Currently, we set the colorimetry to BT.2020 even if the color-depth is
    8 bit. This is not according to HDMI specification.

    This patch makes sure we follow the specs.

    Signed-off-by: Laurentiu Palcu
    CC: Sandor Yu
    Reviewed-by: Sandor Yu
    Reviewed-by: Robert Chiras
    (cherry picked from commit cdacfaadd5dccfdca5dd68640d8f08506f6a9114)

    Laurentiu Palcu
     
  • A fixed PLL PMS setting for attached panel is obviously not
    enough for any other mipi panel which needs a different PLL
    output clock frequency, and besides, for the CEA-861 standard
    display modes, the 'pll_pms' table also can not cover all the
    modes requirements. So a general way is created to solve this
    problem which can provide an optimum solution to output a PLL
    bit clock to match the request frequency in a maximum degree
    and also satisfy the input clock and intermediate clocks limit
    according to the PLL specification.

    Signed-off-by: Fancy Fang
    (cherry picked from commit a73fdd5e48fe0df47685cfc197fe66edc1e28405)

    Fancy Fang
     
  • Add a new property 'pref-rate' support which can be used to
    assign a different clock frequency for the DPHY PLL reference
    clock in the dtb file. And if this property does not exist,
    the default clock frequency for the reference clock will be
    used. And according to the spec, the DPHY PLL reference clk
    frequency should be in [6MHz, 300MHz] range.

    Signed-off-by: Fancy Fang
    (cherry picked from commit a9fafe8108505f8a1580af898ff5fa9c26d03680)

    Fancy Fang
     
  • When there is no existing horizontal blanking word counts in
    'dsim_hblank_par' tables, these data requires to be computed
    according to the 'hfp', 'hbp' and 'hsa' timings which are in
    pixel unit. So the pixel unit data requires to be converted
    to word count unit data correctly to match the PLL output clk
    frequency.

    Signed-off-by: Fancy Fang
    (cherry picked from commit af9ab0d4362d9298978e2ac62033f65ea1cc09ed)

    Fancy Fang
     
  • Change the 'bit_clk' and 'pix_clk' fields of struct sec_mipi_dsim
    and the 'bit_clk' field of struct dsim_pll_pms from 'uint64_t' type
    to 'uint32_t' type, since first, these two fields are in KHz unit,
    and so 32 bit unsigned integer is enough to hold the data values,
    and second, use 32 bit integer can simplify related clocks compute.

    Signed-off-by: Fancy Fang
    (cherry picked from commit 3e62c748a531ca5eacbf6a616d3a979be5222b9c)

    Fancy Fang
     

25 Mar, 2019

1 commit


24 Mar, 2019

7 commits


23 Mar, 2019

1 commit

  • Some rpmsg user may require rpmsg resume before the user start
    handle its irq, e.g the typec controller use a GPIO as irq and
    use rpmsg to get event status, so move imx rpmsg power management
    ops to noirq phrase.

    Reviewed-by: Richard Zhu
    Tested-by: Clark Wang
    Signed-off-by: Anson Huang
    Signed-off-by: Li Jun

    Anson Huang
     

22 Mar, 2019

6 commits

  • Changing error message "Link rate is too high - forcing link to lower rate"
    to a debug message "Lowering DP link rate from to ".

    Signed-off-by: Oliver Brown

    Oliver Brown
     
  • Although the hardware spec doesn't mention the additional operation to
    wait for FrameGen secondary syncup for non-PC cases(FrameGen non-sync mode)
    when we enable a display, it turns out it helps avoid content stream(i.e.,
    extdst0 or extdst1) shadow load done event missing issue when the first
    page flip ocurrs after the display enablement. Black/blanked display
    is observed when the issue happens, which means the video signal is likely
    totally off. Adding this waiting operation also aligns to the cases
    where PC is used.

    Signed-off-by: Liu Ying
    (cherry picked from commit cfedc1269f35054c79d7fd2e2a914e97a4c1a47a)

    Liu Ying
     
  • Another coming patch will wait for framegen secondary channel syncup
    for non-sync mode cases. It appears that waiting for 50ms for video
    modes like 1920x1080p@24 and 1920x1080p@30 is not enough. So, this
    patch increases the timeout value to 100ms.

    Signed-off-by: Liu Ying
    (cherry picked from commit 5357bce465db659d69a5026882a899f2077ee078)

    Liu Ying
     
  • When the interrupt occurs during the USB is entering suspend, the
    cdns->lpm flag may not be updated well, the below oops may occur.
    We treat above interrupt as wakeup interrupt, it should be handled
    after lpm flag is set.

    irq 120: nobody cared (try booting with the "irqpoll" option)
    CPU: 0 PID: 107 Comm: kworker/0:1 Tainted: G O 4.14.78 #1
    Hardware name: Freescale i.MX8QM MEK (DT)
    Workqueue: pm pm_runtime_work
    Call trace:
    [] el1_irq+0xb0/0x124
    [] _raw_spin_unlock_irqrestore+0x18/0x48
    [] __irq_put_desc_unlock+0x1c/0x44
    [] enable_irq+0x54/0x90
    [] cdns3_enter_suspend+0x30c/0x3ac
    [] cdns3_runtime_suspend+0x40/0x78
    [] pm_generic_runtime_suspend+0x28/0x48
    [] genpd_runtime_suspend+0x90/0x21c
    [] __rpm_callback+0x130/0x264
    [] rpm_callback+0x24/0x78
    [] rpm_suspend+0x10c/0x668
    [] rpm_idle+0x1c0/0x390
    [] pm_runtime_work+0x94/0xe0
    [] process_one_work+0x140/0x3f8
    [] worker_thread+0x138/0x3e4
    [] kthread+0x104/0x130
    [] ret_from_fork+0x10/0x18

    Signed-off-by: Peter Chen

    Peter Chen
     
  • Signed-off-by: ming_qian

    ming_qian
     
  • Error implement in function CDN_API_DPTX_ForceLanes_blocking,
    it should call function CDN_API_DPTX_ForceLanes.

    Signed-off-by: Sandor Yu
    (cherry picked from commit 458736a5adeec6527dc86de5993c7ddec84daa15)

    Sandor Yu
     

21 Mar, 2019

4 commits

  • Add support for suspend and resume operation for PM in CAAM driver.

    When the CAAM goes in suspend, the hardware is considered to do nothing.

    On some platforms, the power of the CAAM is not turned off so it keeps
    its configuration.

    On other platforms, it doesn't so it is necessary to save the state of
    the CAAM:
    - JRs MID
    - Address of input and output rings

    Limitation:
    When the CAAM is powered OFF, it is resetted so the JDKEK and TDKEK
    changes. This impacts crypto transforms using MDHA split-keys
    which are kept over suspend as they are encrypted with the JDKEK:
    - hmac(*) from caamhash.c
    - authenc(hmac(*),*) from caamalg.c
    - echainiv(authenc(hmac(*),*)) from caamalg.c
    The issue was already present in current code so this patch does not
    add a regression in this regard.

    Reviewed-by: Horia Geantă
    Signed-off-by: Franck LENORMAND
    (cherry picked from commit b90e25f285a65ee8c8433aba7fe8b19b2cdf70b9)

    Franck LENORMAND
     
  • The structure partid is not suitable to represent the DECO MID register.

    This patch replace partid by masterid which is more appropriate.

    Reviewed-by: Horia Geantă
    Signed-off-by: Franck LENORMAND
    (cherry picked from commit 49d6d90809cb04ae3a63e7e87f670014ab5da0a1)

    Franck LENORMAND
     
  • The previous patch create a DMA issue detected with
    DMA debug as the size unmapped is not always the size
    mapped.

    Signed-off-by: Franck LENORMAND
    (cherry picked from commit 00bd0d58f4d339d0488c4eb102e34e70edd017ee)

    Franck LENORMAND
     
  • Roland reports the following issue and provides a root cause analysis:

    "On a v4.19 i.MX6 system with IMA and CONFIG_DMA_API_DEBUG enabled, a
    warning is generated when accessing files on a filesystem for which IMA
    measurement is enabled:

    ------------[ cut here ]------------
    WARNING: CPU: 0 PID: 1 at kernel/dma/debug.c:1181 check_for_stack.part.9+0xd0/0x120
    caam_jr 2101000.jr0: DMA-API: device driver maps memory from stack [addr=b668049e]
    Modules linked in:
    CPU: 0 PID: 1 Comm: switch_root Not tainted 4.19.0-20181214-1 #2
    Hardware name: Freescale i.MX6 Quad/DualLite (Device Tree)
    Backtrace:
    [] (dump_backtrace) from [] (show_stack+0x20/0x24)
    [] (show_stack) from [] (dump_stack+0xa0/0xcc)
    [] (dump_stack) from [] (__warn+0xf0/0x108)
    [] (__warn) from [] (warn_slowpath_fmt+0x58/0x74)
    [] (warn_slowpath_fmt) from [] (check_for_stack.part.9+0xd0/0x120)
    [] (check_for_stack.part.9) from [] (debug_dma_map_page+0x144/0x174)
    [] (debug_dma_map_page) from [] (ahash_final_ctx+0x5b4/0xcf0)
    [] (ahash_final_ctx) from [] (ahash_final+0x1c/0x20)
    [] (ahash_final) from [] (crypto_ahash_op+0x38/0x80)
    [] (crypto_ahash_op) from [] (crypto_ahash_final+0x20/0x24)
    [] (crypto_ahash_final) from [] (ima_calc_file_hash+0x29c/0xa40)
    [] (ima_calc_file_hash) from [] (ima_collect_measurement+0x1dc/0x240)
    [] (ima_collect_measurement) from [] (process_measurement+0x4c4/0x6b8)
    [] (process_measurement) from [] (ima_file_check+0x88/0xa4)
    [] (ima_file_check) from [] (path_openat+0x5d8/0x1364)
    [] (path_openat) from [] (do_filp_open+0x84/0xf0)
    [] (do_filp_open) from [] (do_open_execat+0x84/0x1b0)
    [] (do_open_execat) from [] (__do_execve_file+0x43c/0x890)
    [] (__do_execve_file) from [] (sys_execve+0x44/0x4c)
    [] (sys_execve) from [] (ret_fast_syscall+0x0/0x28)
    ---[ end trace 3455789a10e3aefd ]---

    The cause is that the struct ahash_request *req is created as a
    stack-local variable up in the stack (presumably somewhere in the IMA
    implementation), then passed down into the CAAM driver, which tries to
    dma_single_map the req->result (indirectly via map_seq_out_ptr_result)
    in order to make that buffer available for the CAAM to store the result
    of the following hash operation.

    The calling code doesn't know how req will be used by the CAAM driver,
    and there could be other such occurrences where stack memory is passed
    down to the CAAM driver. Therefore we should rather fix this issue in
    the CAAM driver where the requirements are known."

    Fix this problem by:
    -instructing the crypto engine to write the final hash in state->caam_ctx
    -subsequently memcpy-ing the final hash into req->result

    Reported-by: Roland Hieber
    Signed-off-by: Horia Geantă
    Signed-off-by: Franck LENORMAND
    (cherry picked from commit d8e87d0a42ce7ff9d96c4197c8df4b22e181c780)

    Franck LENORMAND