03 Jun, 2013
6 commits
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This patch adds Vybrid VF610 to mxc_ocotp document.
Signed-off-by: Alison Wang
Reviewed-by: Benoît Thébaudeau -
This patch adds lpuart support for Vybrid VF610 platform.
Signed-off-by: TsiChung Liew
Signed-off-by: Alison Wang -
This patch adds watchdog support for Vybrid VF610 platform.
Signed-off-by: Alison Wang
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This patch adds FEC support for Vybrid VF610 platform.
In function fec_open(), RCR register is only set as RGMII mode. But RCR
register should be set as RMII mode for VF610 platform.
This configuration is already done in fec_reg_setup(), so this piece of
code could just leave untouched the FEC_RCNTRL_RGMII / FEC_RCNTRL_RMII /
FEC_RCNTRL_MII_MODE bits.Signed-off-by: Alison Wang
Reviewed-by: Benoit Thebaudeau
Reviewed-by: Benoît Thébaudeau -
This patch adds generic codes to support Freescale's Vybrid VF610 CPU.
It aligns Vybrid VF610 platform with i.MX platform. As there are
some differences between VF610 and i.MX platforms, the specific
codes are in the arch/arm/cpu/armv7/vf610 directory.Signed-off-by: Alison Wang
Reviewed-by: Benoît Thébaudeau -
This patch adds the IOMUX support for Vybrid VF610 platform.
There is a little difference for IOMUXC module between VF610 and i.MX
platform, the muxmode and pad configuration share one 32bit register on
VF610, but they are two independent registers on I.MX platform. A
CONFIG_IOMUX_SHARE_CONFIG_REG was introduced to fit this difference.Signed-off-by: Alison Wang
Acked-by: Stefano Babic
Reviewed-by: Benoît Thébaudeau
16 May, 2013
5 commits
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Fix typo in wandboard README file.
Signed-off-by: Luka Perkov
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Currently the mxsfb driver takes the display timings from the 'videomode'
environment variable.Provide an example on how to set 'videomode' for using splash screen on
mx23evk and mx28vk boards.Signed-off-by: Fabio Estevam
Tested-by: Marek Vasut -
Enable display support.
Signed-off-by: Fabio Estevam
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Enable display support.
Signed-off-by: Fabio Estevam
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Signed-off-by: Benoît Thébaudeau
12 May, 2013
2 commits
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The manual resolution in commit ec7023db wrongly removed functions
nand_init and nand_deselect from file drivers/mtd/nand/mxc_nand_spl.c.
Revert this removal.Signed-off-by: Albert ARIBAUD
Acked-by: Stefano Babic
11 May, 2013
2 commits
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Conflicts:
drivers/mtd/nand/mxc_nand_spl.c
include/configs/m28evk.h
10 May, 2013
25 commits
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The boot parameters passed from SPL to UBOOT
must be saved as a part of uboot's gd data
as early as possible, before we will inadvertently
overwrite it. So adding a arch_cpu_init for the required
Socs to save it.Signed-off-by: Sricharan R
[trini: Add igep0033 hunk]
Signed-off-by: Tom Rini -
The boot parameters are read from individual variables
assigned for each of them. This been corrected and now
they are stored as a part of the global data 'gd'
structure. So read them from 'gd' instead.Signed-off-by: Sricharan R
[trini: Add igep0033 hunk]
Signed-off-by: Tom Rini -
Currently save_boot_params saves the boot parameters passed
from romcode. But this is not stored in a writable location
consistently. So the current code would not work for a
'XIP' boot. Change this by saving the boot parameters in
'gd' which is always writable. Also add a 'C' function
instead of an assembly code that is more readable.Signed-off-by: Sricharan R
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These defines are same across OMAP4/5. So move them to
omap_common.h. This is required for the patches that
follow.Signed-off-by: Sricharan R
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omap_boot_parameters is same and defined for each
soc. So move this to a common place to reuse it
across socs.Signed-off-by: Sricharan R
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The arm_freq and ddr_freq variables are unused, so remove. Fixup
whitespace slightly while in here.Reviewed-by: Peter Korsgaard
Signed-off-by: Tom Rini -
these variables are curently defined in several config files but the
driver doesn't use them and defaults to hardcoded values in
nand_defs.hIt's interesting to be able to change this hardcoded valude when the
hardware is not using the default adress signals to drive ALE and CLE
and two configuration defines already exist for this purpose so use
them.Signed-off-by: Eric Bénard
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this is needed to bring UART0 out of reset but this function
currently only exists for dm644x/355/365/646x when da850 (at
least am1808 also need it).Signed-off-by: Eric Bénard
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Several minor updates to the cm-t35 config file.
Signed-off-by: Igor Grinberg
Tested-by: Nikita Kiryanov -
"cm-t35" in U-Boot source code is called "cm_t35".
Make the change "cm-t35" -> "cm_t35" for better greppability.Signed-off-by: Igor Grinberg
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Currently the cm-t35 support code lives under board/cm_t35 directory.
Some of the code can be shared with other/future CompuLab boards,
so move the cm-t35 to live under board/compulab/cm_t35 directory.Signed-off-by: Igor Grinberg
Tested-by: Nikita Kiryanov -
Add the flag to allow runtime enviroment variable modifications.
This is being added so that the board-name can be modified at runtime
to indicate either a panda(4430) or a panda-es(4460)Signed-off-by: Dan Murphy
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Fix the device tree loading for panda(4430) and panda-es(4460)
Modify the board name if a 4460 panda or panda-es is detected
at run time.
In the findfdt add a check for the panda-es board name and load
the panda-es device tree blob.Signed-off-by: Dan Murphy
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Warm reset on OMAP5 freezes when USB cable is connected.
Fix requires PRM_RSTTIME.RSTTIME1 to be programmed
with the time for which reset should be held low for the
voltages and the oscillator to reach stable state.There are 3 parameters to be considered for calculating
the time, which are mostly board and PMIC dependent.
-1- Time taken by the Oscillator to shut + restart
-2- PMIC OTP times
-3- Voltage rail ramp times, which inturn depends on the
PMIC slew rate and value of the voltage ramp needed.In order to keep the code in u-boot simple, have a way
for boards to specify a pre computed time directly using
the 'CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC'
option. If boards fail to specify the time, use a default
as specified by 'CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC' instead.
Using the default value translates into some ~22ms and should work in
all cases.
However in order to avoid this large delay hiding other bugs,
its recommended that all boards look at their respective data
sheets and specify a pre computed and optimal value using
'CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC'In order to help future board additions to compute this
config option value, add a README at doc/README.omap-reset-time
which explains how to compute the value. Also update the toplevel
README with the additional option and pointers to
doc/README.omap-reset-time.Signed-off-by: Lokesh Vutla
[rnayak@ti.com: Updated changelog and added the README]
Signed-off-by: Rajendra Nayak -
As part of a review of a recent patch to add a new AM335x board, Tom
found several duplicate and/or unused #defines.This patch simply removes them.
The two affected configs have been recompiled to check nothing was
broken (from a compilation point of view !!)Reported-by: Tom Rini
Signed-off-by: Mark Jackson -
Add 'optargs' variable to be set to additional kernel arguments, similar
to omap3*/am3* usage.Cc: Sricharan R
Signed-off-by: Tom Rini -
USB TLL clocks do not support 'explicit_en', only 'hw_auto'
control (R. Sricharan). cm_l3init_hsusbtll_clkctrl has to be
moved to the clk_modules_hw_auto_essential[] array in order
to make the clock work.This fix is needed (but not sufficient) for USB EHCI operation
in U-Boot.Signed-off-by: Lubomir Popov
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The IGEP COM AQUILA and CYGNUS are industrial processors modules with
following highlights:o AM3352/AM3354 Texas Instruments processor
o Cortex-A8 ARM CPU
o 3.3 volts Inputs / Outputs use industrial
o 256 MB DDR3 SDRAM / 128 Megabytes FLASH
o MicroSD card reader on-board
o Ethernet controller on-board
o JTAG debug connector available
o Designed for industrial range purposesSigned-off-by: Enric Balletbo i Serra
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These boards uses Samsung K4B2G1646E-BIH9 a 2Gb E-die DDR3 SDRAM.
Signed-off-by: Enric Balletbo i Serra
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EMIF supports a global warm reset mode, during which the
EMIF keeps the SDRAM content. But if leveling is enabled
at the time of warm reset for DDR3, the following steps
needs to be done after warm reset:
1) Keep EMIF in self refresh mode.
2) Reset PHY to bring back the PHY to a known state.
3) Start Levelling procedure.
Doing the same.
And also enabling DLL lock and code output after warm reset.Tested on OMAP5432 ES2.0
Signed-off-by: Lokesh Vutla
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We are able to tell the difference between xM Rev Ax/Bx and xM Rev Cx,
and have been for some time. The comment above the function however did
not list this, so update.Signed-off-by: Tom Rini
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I2C4 and I2C5 are utilized on all known OMAP5 hardware platforms.
In order to be able to select one of these buses however, I2C_BUS_MAX
has to be set to 5; do this here.Please note that for working bus selection, a fix to the i2c driver
is required as well (subject of a separate patch).Signed-off-by: Lubomir Popov
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I2C4 and I2C5 are utilized on all known OMAP5 hardware platforms.
The I2C4 and I2C5 base addresses were however not defined; do this
here.Signed-off-by: Lubomir Popov
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I2C4 and I2C5 are utilized on all known OMAP5 hardware platforms.
The i2c5 clock was however not enabled; do this here.Signed-off-by: Lubomir Popov
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Add an header guard to common header file to prevent multiple
includes messing things up.Signed-off-by: Nishanth Menon
