26 Apr, 2016

1 commit


04 Apr, 2016

1 commit


24 Mar, 2016

1 commit


17 Mar, 2016

1 commit

  • GPIO pins need to be set up on start-up. Add a driver to provide this,
    configured from the device tree.

    The binding is slightly different from the existing ICH6 binding, since that
    is quite verbose. The new binding should be just as extensible.

    Signed-off-by: Simon Glass
    Acked-by: Bin Meng

    Simon Glass
     

15 Mar, 2016

1 commit


17 Feb, 2016

1 commit


02 Feb, 2016

1 commit


19 Jan, 2016

1 commit

  • In a number of places we had wordings of the GPL (or LGPL in a few
    cases) license text that were split in such a way that it wasn't caught
    previously. Convert all of these to the correct SPDX-License-Identifier
    tag.

    Signed-off-by: Tom Rini

    Tom Rini
     

01 Dec, 2015

1 commit


23 Oct, 2015

1 commit


03 Sep, 2015

1 commit


13 Aug, 2015

1 commit


29 Jul, 2015

1 commit

  • All based off of Tegra124. As a Tegra210 board is brought
    up, these may change a bit to match the HW more closely,
    but probably 90% of this is identical to T124.

    Note that since T210 is a 64-bit build, it has no SPL
    component, and hence no cpu.c for Tegra210.

    Signed-off-by: Tom Warren

    Tom Warren
     

09 Jul, 2015

1 commit

  • This also came from Linux - according to this thread it has a GPL v2
    license like arch/arm/mach-omap2/mux.h:

    http://lists.denx.de/pipermail/u-boot/2015-June/217827.html

    Signed-off-by: Simon Glass
    Reported-by: Ingrid Viitanen
    Reviewed-by: Tom Rini

    Simon Glass
     

04 Jun, 2015

2 commits

  • Every pin can be configured now from the device tree. A dt-bindings
    has been added to describe the different property available.

    Change-Id: I1668886062655f83700d0e7bbbe3ad09b19ee975
    Signed-off-by: Gabriel Huau
    Acked-by: Simon Glass

    Gabriel Huau
     
  • PIRQ routing is pretty much common in Intel chipset. It has several
    PIRQ links (normally 8) and corresponding registers (either in PCI
    configuration space or memory-mapped IBASE) to configure the legacy
    8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing
    support using device tree and move it to a common place, so that we
    can easily add PIRQ routing support on a new platform.

    Signed-off-by: Bin Meng
    Acked-by: Simon Glass

    Bin Meng
     

15 May, 2015

1 commit

  • This commit adds dtsi file for Sandbox PMIC.
    It fully describes the PMIC by:
    - i2c emul node - with a default settings of 16 registers
    - 2x buck regulator nodes
    - 2x ldo regulator nodes

    The default register settings are set with preprocessor macros:
    - VAL2REG(min[uV/uA], step[uV/uA], val[uV/uA])
    - VAL2OMREG(mode id)
    Both defined in file:
    - include/dt-bindings/pmic/sandbox_pmic.h

    The Voltage ranges of each regulator can be found in:
    - include/power/sandbox_pmic.h

    The new file is included into:
    - sandbox.dts
    - test.dts

    Signed-off-by: Przemyslaw Marczak
    Acked-by: Simon Glass
    Tested on sandbox:
    Tested-by: Simon Glass

    Przemyslaw Marczak
     

04 May, 2015

1 commit

  • Bring all the sunxi dts files (and update existing ones) from
    mripard/sunxi/dt-for-4.1 (which will be merged into upstream master any
    day now). This is necessary so that we can move all sunxi boards over to
    the driver model.

    Signed-off-by: Hans de Goede
    Reviewed-by: Simon Glass
    Acked-by: Ian Campbell

    Hans de Goede
     

07 Feb, 2015

1 commit


19 Dec, 2014

3 commits

  • Add the device tree node for the PCIe controller found on Tegra30 SoCs.

    Signed-off-by: Thierry Reding
    Signed-off-by: Simon Glass
    Signed-off-by: Tom Warren

    Thierry Reding
     
  • Add the device tree node for the PCIe controller found on Tegra20 SoCs.

    Acked-by: Stephen Warren
    Signed-off-by: Thierry Reding
    Signed-off-by: Simon Glass
    Signed-off-by: Tom Warren

    Thierry Reding
     
  • This controller was introduced on Tegra114 to handle XUSB pads. On
    Tegra124 it is also used for PCIe and SATA pin muxing and PHY control.
    Only the Tegra124 PCIe and SATA functionality is currently implemented,
    with weak symbols on Tegra114.

    Tegra20 and Tegra30 also provide weak symbols for these functions so
    that drivers can use the same API irrespective of which SoC they're
    being built for.

    Signed-off-by: Thierry Reding
    Signed-off-by: Simon Glass
    Signed-off-by: Tom Warren

    Thierry Reding
     

16 Dec, 2014

1 commit


12 Dec, 2014

1 commit

  • Sync this up with Linux v3.18-rc5. Exclude features that are unlikely to
    supported in U-Boot soon (regulators, pinmux). Also the addresses are
    updated to 32-bit. Otherwise it is the same. Also bring in the dt-bindings
    for pinctrl.

    Signed-off-by: Simon Glass
    Acked-by: Stephen Warren

    Simon Glass
     

06 Dec, 2014

1 commit


12 Nov, 2014

1 commit


07 Nov, 2014

1 commit

  • This patch includes the latest DT sources for socfpga from the current
    Linux kernel. And enables CONFIG_OF_CONTROL for the new build target
    "socfpga_socrates" (the EBV SoCrates board) to make use of this new DT
    support.

    Until this patch, the only SoCFPGA U-Boot target in mainline is
    "socfpga_cyclone5". This build target is not (yet) changed to support
    DT. So nothing changes for this target. Even though the long-term
    goal should be to move all SoCFPGA targets over to DT.

    One of the reasons to enable DT support in SoCFPGA is, that I need to
    support multiple different SPI controllers for this platform. This is
    the QSPI Cadence controller and the Designware SPI master controller.
    Both are implemented in the SoCFPGA. And enabling both controllers is
    only possible by using the new driver model (DM). The DM SPI code
    only supports DT based probing. So it was easier to move SoCFPGA to
    DT than to add the (deprecated) platform-data based probing to the
    DM SPI suport.

    Note that the image with the dtb embedded is u-boot-dtb.img. This needs
    to be used now for those DT enabled boards instead of u-boot.img.

    Signed-off-by: Stefan Roese
    Cc: Marek Vasut
    Cc: Chin Liang See
    Cc: Dinh Nguyen
    Cc: Vince Bridgers
    Cc: Albert Aribaud
    Cc: Pavel Machek
    Cc: Simon Glass

    Stefan Roese
     

05 Nov, 2014

1 commit

  • These are from Linux 3.17-rc7 (commit fe82dcec). U-Boot only uses a small
    portion of these, but we may as well have something to look forward to.

    The total compiled size is about 25KB.

    Acked-by: Hans de Goede
    Signed-off-by: Simon Glass
    Signed-off-by: Hans de Goede

    Simon Glass
     

24 Oct, 2014

1 commit


11 Sep, 2014

1 commit

  • Some Tegra device tree files do not include information about the serial
    ports. Add this and also add information about the input clock speed.

    The console alias needs to be set up to indicate which port is used for
    the console.

    Also add a binding file since this is missing.

    Series-changes; 5
    - Add full serial port nodes from Linux tree (commit fc9d4dbe)
    - Use /chosen/stdout-path instead of /aliases/console to specify the console

    Signed-off-by: Simon Glass

    Simon Glass
     

21 Jun, 2014

1 commit