27 Jul, 2019
1 commit
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- fix for fsl_qspi read timeout (Thomas)
- spi-mem read data size fix (Ye Li)
- SiFive SPI driver, mmc_spi flags (Bhargav, Anup)
- Micron spi-nor parts (Ashish)
- MT7629 spi-mem driver(Weijie)
26 Jul, 2019
24 commits
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- DaVinci emac DM work
- NXP driver work
- macb updates for RISC-V -
H3/H5 can either use the internal phy or an external one.
Before getting clock and resets for the internal phy,
test that we are using it because otherwise it break emac
when using an external phy.Tested-on: OrangePi PC2 (H5)
Fixes: 2348453c41 (net: sun8i_emac: Add EPHY CLK and RESET support)
Signed-off-by: Emmanuel Vadot
Acked-by: Joe Hershberger -
Now that we removed all legacy boards selecting TI_EMAC we can
completely convert the driver code to using the driver model.
This patch also updates all remaining users of davinci_emac.Signed-off-by: Bartosz Golaszewski
Tested-by: Adam Ford #am3517-evm & da850-evm
Reviewed-by: Ramon Fried -
Instead of depending on CONFIG_SYS_LITTLE_ENDIAN, we check at runtime
whether underlying system is little-endian or big-endian. This way
we are not dependent on any U-Boot specific OR compiler specific macro
to check system endianness.Signed-off-by: Anup Patel
Reviewed-by: Bin Meng
Reviewed-by: Ramon Fried
Acked-by: Joe Hershberger -
The SiFive MACB ethernet has a custom TX_CLK_SEL register to select
different TX clock for 1000mbps vs 10/100mbps.This patch adds SiFive MACB compatible string and extends the MACB
ethernet driver to change TX clock using TX_CLK_SEL register for
SiFive MACB.Signed-off-by: Anup Patel
Reviewed-by: Bin Meng
Reviewed-by: Ramon Fried
Acked-by: Joe Hershberger -
In the case of the tsec network driver, so far there has been no
mainline user of DM_ETH where the DT bindings get used.In the case of the mdio bus, it looks like the "fsl,tsec-mdio" string
was made up for the documentation, but there is no mainline code that
parses the "compatible" property anyway.In both cases, there are no DT blobs that contain the old strings.
So change the documentation to "fsl,etsec2" for the Ethernet ports and
"fsl,etsec2-mdio" for the MDIO buses, which are strings that Linux also
uses, at least for LS1021A. More compatible strings can be added once
other (PowerPC) SoCs are migrated to DM_ETH.The current ls1021a.dtsi doesn't match what was documented for the MDIO
buses anyway (the "compatible" is "gianfar" currently). This will be
fixed in the next patch.Fixes: 69a00875e3db ("doc: dt-bindings: Describe Freescale TSEC ethernet controller")
Signed-off-by: Vladimir Oltean
Reviewed-by: Bin Meng
Acked-by: Joe Hershberger -
In tsec_init, the MAC address is retrieved from 2 different structures
depending on whether DM_ETH is enabled or not.But since the field name is the same inside both structures, we can
conditionally define the structure of the correct type and simplify the
assignments.Signed-off-by: Vladimir Oltean
Acked-by: Joe Hershberger
Reviewed-by: Bin Meng -
This replaces debug() calls with printf() so that it is immediately
obvious from the console that something is wrong.Signed-off-by: Vladimir Oltean
Acked-by: Joe Hershberger
Reviewed-by: Bin Meng -
This is a cosmetic patch that reorders variable definitions in the
inverse order of their line length, where possible.Signed-off-by: Vladimir Oltean
Acked-by: Joe Hershberger
Reviewed-by: Bin Meng -
By convention, the eTSEC MDIO controller nodes are defined in DT at
0x2d24000 and 0x2d50000, but actually U-Boot does not touch the
interrupt portion of the register map (MDIO_IEVENTM, MDIO_IMASKM,
MDIO_EMAPM).That leaves only the MDIO bus registers (MDIO_MIIMCFG, MDIO_MIIMCOM,
MDIO_MIIMADD, MDIO_MIIMADD, MDIO_MIIMCON, MDIO_MIIMSTAT) which start at
the 0x520 offset.So shift the DT-defined register map by the offset of MDIO_MIIMCFG when
mapping the MDIO bus registers.Signed-off-by: Vladimir Oltean
Acked-by: Joe Hershberger
Reviewed-by: Bin Meng -
The point of this patch is to eliminate the use of the locally-defined
"reg" variable (which interferes with next patch) and simplify the
fallback to the default CONFIG_SYS_TBIPA_VALUE in case "tbi-handle" is
missing.Signed-off-by: Vladimir Oltean
Acked-by: Joe Hershberger
Reviewed-by: Bin Meng -
Macb Ethernet controller requires a RX buffer of 128 bytes. It is
highly sub-optimal for Gigabit-capable GEM that is able to use
a bigger DMA buffer. Change this constant and associated macros
with data stored in the private structure.
RX DMA buffer size has to be multiple of 64 bytes as indicated in
DMA Configuration Register specification.Signed-off-by: Ramon Fried
Acked-by: Joe Hershberger -
DMA configuration was heavily dependent on the HW
defaults, add function to properly set the required
fields, including the new dma_burst_length.Signed-off-by: Ramon Fried
Reviewed-by: Anup Patel
Tested-by: Anup Patel
Acked-by: Joe Hershberger -
GEM support higher DMA burst writes/reads than the default (4).
add configuration structure with dma burst length so it could be
applied later to DMA configuration.Signed-off-by: Ramon Fried
Reviewed-by: Anup Patel
Tested-by: Anup Patel
Acked-by: Joe Hershberger -
This patch adds support for the sgmii phy interface,
available only to DM users, dictated by current driver
design.Signed-off-by: Ramon Fried
Reviewed-by: Anup Patel
Tested-by: Anup Patel
Acked-by: Joe Hershberger -
macb.h provides macros for reading/setting bitfields,
in macb registers and descriptors. use that instead
of redefining them in the source file.Signed-off-by: Ramon Fried
Reviewed-by: Anup Patel
Tested-by: Anup Patel
Acked-by: Joe Hershberger -
add support for clock rates higher than 2.4Mhz
Signed-off-by: Ramon Fried
Reviewed-by: Anup Patel
Tested-by: Anup Patel
Acked-by: Joe Hershberger -
Few registers and bits were added by Cadence and
they were not updated in the headers.
Take the latest definitions as defined in Linux
header (5.1) that also includes some comments
about existing registers.One register was improperly named (UR), fix that.
Signed-off-by: Ramon Fried
Reviewed-by: Anup Patel
Tested-by: Anup Patel
Acked-by: Joe Hershberger -
This driver is used for MDIO muxes driven over I2C. This is currently
used on Freescale LS1028A QDS board, on which the physical MDIO MUX is
controlled by an on-board FPGA which in turn is configured through I2C.Signed-off-by: Alex Marginean
Acked-by: Joe Hershberger
Reviewed-by: Bin Meng -
Using 'phy_connect' instead of 'phy_find_by_mask' and 'phy_connect_dev'
both deduplicates code and adds support for 'fixed-link'.Signed-off-by: Simon Goldschmidt
Acked-by: Joe Hershberger -
SGMII 2500 as supported on NXP SoCs requires AN to be disabled, handle
this case in the enetc sgmii init code.Signed-off-by: Alex Marginean
Acked-by: Joe Hershberger -
Ethernet interfaces using serial protocols go through the serdes block
integrated in the SoC. This is accessed over dedicated internal MDIOs
which are part of the Ethernet PCI functions. Set up serdes at _start,
along with other protocol specific port/MAC configuration.
MDIO code is shared with enetc_mdio, read/write functions are exported
from fsl_enetc_mdio for this reason.Signed-off-by: Alex Marginean
Reviewed-by: Bin Meng
Acked-by: Joe Hershberger -
Adds a driver for the MDIO interface currently integrated in LS1028A SoC.
This MDIO interface is shared by multiple ethernet interfaces and is
presented as a stand-alone PCI function on the SoC ECAM.
Ethernet has a functional dependency on MDIO, for simplicity there is a
single config option for both.Signed-off-by: Alex Marginean
Reviewed-by: Bin Meng
Acked-by: Joe Hershberger -
Adds a driver for NXP ENETC ethernet controller currently integrated in
LS1028A. ENETC is a fairly straight-forward BD ring device and interfaces
are presented as PCI EPs on the SoC ECAM.Signed-off-by: Catalin Horghidan
Signed-off-by: Alex Marginean
Reviewed-by: Bin Meng
Acked-by: Joe Hershberger
25 Jul, 2019
7 commits
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Since u-boot has added the spi-mem framework and replaced
the spi-nor framework, the mtk_qspi is no longer compatible
with the new spi-nor driver.Remove this driver along with replacing config item
with new mtk spi-nor driver.Signed-off-by: Weijie Gao
[jagan: squash related changes and update commit message]
Signed-off-by: Jagan Teki
Reviewed-by: Jagan Teki -
This patch adds spi-mem driver for MediaTek MT7629 SoC
to access SPI-NOR and SPI-NAND flashes.Signed-off-by: Weijie Gao
[jagan: squash MAINTAINERS file]
Signed-off-by: Jagan Teki
Reviewed-by: Jagan Teki -
Reduce power domain calls when CONFIG_POWER_DOMAIN is disabled.
With gcc v8.2, this change saves 104 bytes.Signed-off-by: Anatolij Gustschin
Reviewed-by: Peng Fan -
Right now when using clk_of_xlate_default(), clk->data
remains un-initialized because clk_get_bulk() does not
initialize memory on allocation of clock structure.This can cause problems when data is used to match if
two clocks pointers are exactly the same underlying
clocks, for example.Fix it by initializing clk->data to 0.
Suggested-by: Lokesh Vutla
Signed-off-by: Sekhar Nori -
Per device tree spec, "status" property can have a value of "okay",
or "disabled", but not "disable".Signed-off-by: Bin Meng
Reviewed-by: Simon Glass -
Without a valid ofnode, it's meaningless to call clk_set_defaults()
to process various properties.Signed-off-by: Bin Meng
Reviewed-by: Simon Glass -
It is possible that a timer device has a null ofnode, hence there is
no need to further parse DT for the clock rate.Signed-off-by: Bin Meng
Reviewed-by: Simon Glass
24 Jul, 2019
1 commit
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- add rtc driver for stm32mp1
- add remoteproc driver for stm32mp1
- use kernel qspi compatible string for stm32
23 Jul, 2019
1 commit
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- rk3399 sdhci driver fixup
- TPL BANNER fixup
22 Jul, 2019
6 commits
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mt35xu512aba and mt35xu02g suports Single I/O and OCTAL I/O
also enable use of SPI_NOR_4B_OPCODES.These flashes are tested on LX2160ARDB and LS1028ARDB respectively
Signed-off-by: Kuldeep Singh
Signed-off-by: Ashish Kumar
[jagan: suffix 'ba' on part name and update commit message]
Signed-off-by: Jagan Teki
Reviewed-by: Jagan Teki -
Add support of STM32MP1 rtc driver.
Enable it for basic and trusted configurations.Signed-off-by: Benjamin Gaignard
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Add RTCAPB and RTC clock support.
Signed-off-by: Benjamin Gaignard
Signed-off-by: Patrick Delaunay -
"st,stm32-qspi" is no more used, remove it.
Signed-off-by: Patrice Chotard
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This patch introduces support of Cortex-M4 remote processor for STM32
MCU and MPU families.Signed-off-by: Loic Pallardy
Signed-off-by: Fabien Dessenne -
The current implementation supports only binary file load.
Add helpers to support ELF32 format (sanity check, and load).
Note that since an ELF32 image is built for the remote processor, the
load function uses the device_to_virt ops to translate the addresses.
Implement a basic translation for sandbox_testproc.Add related tests. Test result:
=> ut dm remoteproc_elf
Test: dm_test_remoteproc_elf: remoteproc.c
Test: dm_test_remoteproc_elf: remoteproc.c (flat tree)
Failures: 0Signed-off-by: Loic Pallardy
Signed-off-by: Fabien Dessenne
Reviewed-by: Lokesh Vutla
