Eric Lee / smarc-uboot

15 Oct, 2019

1 commit

  • 71e4d7373   MLK-22757-1 imx8: Update SCFW API to fix HDP authentication issue ... Browse Code »

    Current codes have wrong definitions for SC_MISC_SECO_AUTH_SECO_FW,
    SC_MISC_SECO_AUTH_HDMI_TX_FW and SC_MISC_SECO_AUTH_HDMI_RX_FW and
    cause HDP firmware authentication failed.

    Sync the API definitions with latest SCFW export.

    Signed-off-by: Ye Li
    (cherry picked from commit 87ee3c16a649a418b8c6fdae53234f88a90c8fb3)

    Ye Li
     

09 Jul, 2019

1 commit

24 May, 2019

11 commits

27 Feb, 2019

1 commit

  • c40b6df87   clk: Add SiFive FU540 PRCI clock driver ... Browse Code »

    Add driver code for the SiFive FU540 PRCI IP block. This IP block
    handles reset and clock control for the SiFive FU540 device and
    implements SoC-level clock tree controls and dividers.

    Based on code written by Wesley Terpstra
    found in commit 999529edf517ed75b56659d456d221b2ee56bb60 of:
    https://github.com/riscv/riscv-linux

    Boot and PLL rate change were tested on a SiFive HiFive Unleashed
    board.

    Signed-off-by: Paul Walmsley
    Signed-off-by: Atish Patra
    Signed-off-by: Anup Patel
    Reviewed-by: Alexander Graf

    Anup Patel
     

20 Feb, 2019

1 commit

  • 2ca471379   sound: Add support for Intel HDA ... Browse Code »

    The Intel High-definition Audio is a newer-generation audio system which
    provides for transfer of a large number of audio stream, each containing
    up to 16 channels.

    Add support for HDA as a library which can be used by other drivers.
    U-Boot currently uses only two channels (stereo).

    Signed-off-by: Simon Glass
    Reviewed-by: Bin Meng

    Simon Glass
     

09 Feb, 2019

1 commit

  • e74b74c52   dts: stm32mp1: clock tree update ... Browse Code »

    - Add st,digbypass on clk_hse node (needed for board rev.C)
    - MLAHB/AHB max frequency increased from 200 to 209MHz, with:
    - PLL3P set to 208.8MHz for MCU sub-system
    - PLL3Q set to 24.57MHz for 48kHz SAI/SPI2S
    - PLL3R set to 11.29MHz for 44.1kHz SAI/SPI2S
    - PLL4P set to 99MHz for SDMMC and SPDIFRX
    - PLL4Q set to 74.25MHz for EVAL board

    Signed-off-by: Patrick Delaunay

    Patrick Delaunay
     

26 Jan, 2019

1 commit

19 Jan, 2019

2 commits

  • aa86bf90d   sunxi: A64: Update sun50i-a64-ccu.h ... Browse Code »

    Update sun50i-a64-ccu.h from the Linux sunxi/dt64-for-4.20 tree:
    commit 679294497be31596e1c9c61507746d72b6b05f26
    Author: Rodrigo Exterckötter Tjäder
    Date: Wed Sep 26 19:48:24 2018 +0000
    arm64: dts: allwinner: a64: a64-olinuxino: set the PHY TX delay

    This should be a part of previous sync patch from
    commit 1b39a1834ed182bbd8036a5cd74a9ea111fa4691
    Author: Andre Przywara
    Date: Mon Oct 29 00:56:47 2018 +0000

    sunxi: A64: Update .dts/.dtsi files

    Signed-off-by: Jagan Teki
    Reviewed-by: Andre Przywara

    Jagan Teki
     
  • 8dcc7e692   ARM: dts: sun8i: Update A80 dts(i) from Linux-v4.18-rc3 ... Browse Code »

    Update all A80 devicetree dtsi and dtsi files from
    Linux-v4.18-rc3 with below commits.

    arch/arm/boot/dts/sun9i-a80*:

    commit 190e3138f9577885691540dca59c2f07540bde04
    Merge: cafc87023b0d a7affb13b271
    Author: Arnd Bergmann
    Date: Tue Mar 27 14:58:00 2018 +0200

    Merge tag 'sunxi-h3-h5-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt

    include/dt-bindings/*/sun9i-a80-*:

    commit 783ab76ae553abc23f80ef7511052d055697531b
    Author: Chen-Yu Tsai
    Date: Sat Jan 28 20:22:36 2017 +0800

    clk: sunxi-ng: Add A80 Display Engine CCU

    Note: sun9i-a80-cx-a99.dts is updated only uart0, since the same
    dts is not available in Linux.

    Signed-off-by: Jagan Teki

    Jagan Teki
     

15 Jan, 2019

1 commit

19 Dec, 2018

10 commits

07 Dec, 2018

1 commit

  • fdce9d35d   arm: dts: am33xx: Sync dts with Linux 4.20.0 ... Browse Code »
    14

    This patch synchronizes the am33xx SoC specific files with those from
    Linux 4.20.0. Hence all board maintainers of am33xx based boards are
    on the cc list.
    The main purpose of this patch is to prevent further diverging of the
    dts files from U-Boot and those from Linux. It aims to set the stage
    for the synchronization of board specific dts files. Example: I'm the
    maintainer of the PDU001 board: once this patch is applied successfully
    I will make changes to the board specific dts file in Linux only and
    then post a patch with a copy of this exact dts file to U-Boot. This
    will make U-Boot and Linux remain in sync.
    The stumbling block of https://patchwork.ozlabs.org/patch/943627 was
    removed by the patch https://patchwork.ozlabs.org/patch/962428 from
    Lokesh Vutla (many thanks!). This omap-serial driver allows using the
    Linux am33xx.dtsi file in U-Boot.
    Other changes to dts and dtsi files made by this patch are mainly to
    prevent _new_ warnings during the build process. Especially the warning
    at pinmux@800 stating 'unnecessary #address-cells/#size-cells without
    "ranges" or child "reg"' was not removed. This warning is a good example
    showing the benefit of the synchronization: if it needs to be fixed it
    will be fixed in Linux and ported back to U-Boot.
    Buildman reports all 46 am33xx SoC based boards to build fine, with
    warnings of course. Nevertheless this patch should be tested thoroughly
    on as many boards as possible to prevent any collateral damage.

    Signed-off-by: Felix Brack
    Reviewed-by: Tom Rini

    Felix Brack
     

04 Dec, 2018

1 commit

01 Dec, 2018

1 commit

30 Nov, 2018

1 commit

29 Nov, 2018

2 commits

26 Nov, 2018

1 commit

25 Oct, 2018

1 commit

22 Oct, 2018

2 commits