27 Apr, 2018
10 commits
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When the power domain driver is enabled, we need to enable clocks after power
domain on. So the clock settings can't set in board_init, needs to set them
when the device is probed. Add this weak function in driver, that SoC codes
can implement the clock settings.Reviewed-by: Peng Fan
Signed-off-by: Ye Li
(cherry picked from commit c0e4ac66196b20f363f711fb18e40b70e3be9240) -
The MIB RAM and FIFO receive start register does not exist on
i.MX8. Accessing these register will cause SERROR in kernel.Signed-off-by: Ye Li
(cherry picked from commit 2a47ebbccb95e8482360813d6dff5288429f1248) -
The formal production name starts with imx, so change relevant names
in codes to use this prefix.Signed-off-by: Ye Li
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Add the fuse checking in drivers, when the module is disabled in fuse,
the driver will not work.Changed drivers: BEE, GPMI, APBH-DMA, ESDHC, FEC, QSPI, ECSPI, I2C,
USB-EHCI, GIS, LCDIF and EPDC.Signed-off-by: Ye Li
(cherry picked from commit 1704e116f9b39aeb99201919a18bc2b1e19a980e)
(cherry picked from commit 2d3b5df8530cd5ef883750378838dea7c40259af) -
Since the probe function has changed to reset FEC controller prior than
setup PHY. If reset FEC controller timeout, the priv->phydev is not
initialized, so can't free it.Signed-off-by: Ye Li
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Add i.MX6UL/SX/SL/i.MX7D compatible.
Signed-off-by: Peng Fan
Acked-by: Joe Hershberger -
On i.MX6SX, 6UL and 7D, there are two enet controllers each has a
MDIO port. But Some boards share one MDIO port for the two enets. So
introduce a configuration CONFIG_FEC_MXC_MDIO_BASE to indicate
the MDIO port for sharing.
In Kconfig, user needs enable CONFIG_FEC_MXC_SHARE_MDIO first to enter
the CONFIG_FEC_MXC_MDIO_BASE.To i.MX28, adapt to use the new config
Signed-off-by: Peng Fan
Acked-by: Joe Hershberger
Cc: Fabio Estevam -
To platforms has two enet interface, using dev->seq could
avoid conflict.i.MX6UL/ULL evk board net get the wrong MAC address from fuse,
eth1 get MAC0 address, eth0 get MAC1 address from fuse. Set the
priv->dev_id to device->seq as the real net interface alias id then
.fec_get_hwaddr() read the related MAC address from fuse.Signed-off-by: Peng Fan
Acked-by: Joe Hershberger -
No need to provide two prototype for this function.
Use ulong for the first parameter, then this function
could be shared for DM/non DM case.Signed-off-by: Peng Fan
Acked-by: Joe Hershberger -
When using ethernet DM driver, the recv interface has a
change with non-DM interface, that driver needs to set
the packet pointer and provide it to upper layer to process.In fec driver, the fecmxc_recv functions does not handle the
packet pointer parameter. This may cause crash in upper layer
processing because the packet pointer is not set.This patch allocates a buffer for the packet pointer and free it
through free_pkt interface.Signed-off-by: Ye Li
Reviewed-by: Peng Fan
Acked-by: Joe Hershberger
06 Mar, 2018
1 commit
05 Mar, 2018
2 commits
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Thomas reported U-Boot failed to build host tools if libfdt-devel
package is installed because tools include libfdt headers from
/usr/include/ instead of using internal ones.This commit moves the header code:
include/libfdt.h -> include/linux/libfdt.h
include/libfdt_env.h -> include/linux/libfdt_env.hand replaces include directives:
#include -> #include
#include -> #includeReported-by: Thomas Petazzoni
Signed-off-by: Masahiro Yamada -
Add entries for the R8A77965 M3N SoC.
Signed-off-by: Marek Vasut
Cc: Nobuhiro Iwamatsu
Cc: Joe Hershberger
27 Feb, 2018
9 commits
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Signed-off-by: Arno Steffens
Acked-by: Joe Hershberger -
Fix commit f1bcad22dd19 ("net: e1000: add support for writing to
EEPROM").Signed-off-by: Bernhard Messerklinger
Acked-by: Joe Hershberger -
After commit ba1f966725223 ("net: designware: add clock support")
we got NET broken on axs101 and axs103 platforms.Some clock don't support gating so their clock drivers don't
implement .enable/.disable callbacks. In such case clk_enable
returns -ENOSYS.
Also some clock drivers implement .enable/.disable callbacks not for all
clock IDs and return -ENOSYS (or -ENOTSUPP) for others.If we have such clock in 'clocks' list of designware ethernet controller
node we fail to probe designware ethernet.Fix it.
Signed-off-by: Eugeniy Paltsev
Reviewed-by: Patrice Chotard
Acked-by: Joe Hershberger
Reviewed-by: Philipp Tomsich -
Fix some style violations in the generic PHY management code.
Acked-by: Joe Hershberger
Signed-off-by: Mario Six -
Commit 68e6ecadc551 ("net: phy: marvell 88e151x: Fix handling of RGMII
interface types") fixed the initialization of 88e151x phys, but made it
so that interfaces of type PHY_INTERFACE_MODE_RGMII had both RX and TX
delay bits cleared. The default (like in m88e1111s_config) is to have
both bits set.Hence, this patch changes the behavior in the PHY_INTERFACE_MODE_RGMII
case so that both bits are set.Signed-off-by: Mario Six
Acked-by: Joe Hershberger -
Fix some style violations (mostly wrong indentions) in the Marvell PHY
driver.Acked-by: Joe Hershberger
Signed-off-by: Mario Six -
Make the tsec ethernet driver compatible with a live device tree.
Reviewed-by: Simon Glass
Acked-by: Joe Hershberger
Signed-off-by: Mario Six -
tsec_initialize allocates a private driver structure using malloc.
Should the memory allocation of this private structure fail, the
function execution is aborted with a return 0, but the previously
allocated device structure is never freed, hence leaked.Free the device structure in the error case.
Signed-off-by: Mario Six
Acked-by: Joe Hershberger -
Signed-off-by: Mario Six
Acked-by: Joe Hershberger
23 Feb, 2018
1 commit
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ll_temac driver was used by Xilinx Microblaze big endian and
Xilinx ppc405/ppc440 SoCs.ppc support was removed by: "powerpc: remove 4xx support"
(sha1: 98f705c9cefdfdba62c069821bbba10273a0a8ed)
and Microblaze BE is not tested for a long time that's why this driver
can be removed because none is going to updated it to DM anyway.Signed-off-by: Michal Simek
Acked-by: Joe Hershberger
18 Feb, 2018
4 commits
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Drop the whole map/unmap_physmem stuff and just use the address
already obtained from DT in ofdata_to_platdata(), instead of
repeating that, wrongly, in probe.Signed-off-by: Marek Vasut
Cc: Nobuhiro Iwamatsu
Cc: Joe Hershberger -
Fix minor checkpatch warning about udelay(3000) being too long
and should be replaced by mdelay(3).Signed-off-by: Marek Vasut
Cc: Nobuhiro Iwamatsu
Cc: Joe Hershberger -
Drop the len variable, it's useless.
Signed-off-by: Marek Vasut
Cc: Nobuhiro Iwamatsu
Cc: Joe Hershberger -
Inline this variable which is quite useless.
Signed-off-by: Marek Vasut
Cc: Nobuhiro Iwamatsu
Cc: Joe Hershberger
16 Feb, 2018
1 commit
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Reset and initialize the PHY once in the probe() function rather than
doing it over and over again is start() function. This requires us to
keep the clock enabled while the driver is in use. This significantly
reduces the time between transfers as the PHY doesn't have to restart
autonegotiation between transfers, which takes forever.Signed-off-by: Marek Vasut
Cc: Geert Uytterhoeven
Cc: Joe Hershberger
09 Feb, 2018
1 commit
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There is no value to enable phylib without networking support.
Signed-off-by: Michal Simek
Acked-by: Joe Hershberger
04 Feb, 2018
5 commits
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Implement programming MAC address to the hardware, i.e. external flash
seen as EEPROM.MAC address is only written if it differs from what is already stored in
flash or if reading the current MAC address fails.Signed-off-by: Hannu Lounento
CC: Joe Hershberger
Signed-off-by: Martyn Welch
Signed-off-by: Sebastian Reichel -
Split the implementation of e1000_read_mac_addr into eeprom and register
versions called by e1000_read_mac_addr.This allows for calling e1000_read_mac_addr when MAC address is needed
with no constraints where it is read from, and for calling the register
and, especially, the eeprom version directly in order to specify where
to read the address from.Signed-off-by: Hannu Lounento
CC: Joe Hershberger
Signed-off-by: Martyn Welch
Signed-off-by: Sebastian Reichel -
Port functions for writing to EEPROM, updating the checksum and
committing data to flash from the Linux kernel igb driver.Functions were ported from Linux 4.8-rc2 (694d0d0bb20).
Signed-off-by: Hannu Lounento
CC: Joe Hershberger
Signed-off-by: Martyn Welch
Reviewed-by: Stefano Babic
Acked-by: Joe Hershberger
Signed-off-by: Sebastian Reichel -
When building for 64bits system, we get some warnings about type
cast between pointer and integer. This patch eliminates the warnings
by using ulong/long type which is 32bits on 32bits system or 64bits on
64bits system.Signed-off-by: Ye Li
Signed-off-by: Peng Fan
Acked-by: Joe Hershberger
Reviewed-by: Stefano Babic
Reviewed-by: Fabio Estevam -
The MIB RAM and FIFO receive start register does not exist on
i.MX8M. Accessing these register will cause system hang.Signed-off-by: Peng Fan
Acked-by: Joe Hershberger
Reviewed-by: Stefano Babic
Reviewed-by: Fabio Estevam
Reviewed-by: Stefano Babic
01 Feb, 2018
1 commit
31 Jan, 2018
1 commit
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For for case of lazyapply method, API fdt_fixup_board_enet() gets
invoked before DPL being deployed. This leads to an issue that
fsl-mc fdt fixup status marked as fail and dprc driver didn't get
registered in linux boot.Fixes this issue by calling fdt_fixup_board_enet() for case when
DPL is deployed successfully in lazyapply method.Signed-off-by: Yogesh Gaur
Reviewed-by: York Sun
30 Jan, 2018
1 commit
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When we have a driver that is used on both 32bit and 64bit targets and
we are talking about address space we cannot use u64 nor u32 and instead
need to use phys_addr_t.Fixes: 377883f16d36 ("net: mvpp2x: fix phy connected to wrong mdio issue")
Cc: Stefan Chulski
Signed-off-by: Tom Rini
Reviewed-by: Stefan Roese
Reviewed-by: Joe Hershberger
29 Jan, 2018
3 commits
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The GMAC in the RK3228 once again is identical to the incarnation in
the RK3288 and the RK3399, except for where some of the configuration
and control registers are located in the GRF.This adds the RK3368-specific logic necessary to reuse this driver.
Signed-off-by: David Wu
Acked-by: Philipp Tomsich
Reviewed-by: Philipp Tomsich -
The GMAC2IO in the RK3328 once again is identical to the incarnation in
the RK3288 and the RK3399, except for where some of the configuration
and control registers are located in the GRF.This adds the RK3328-specific logic necessary to reuse this driver.
Signed-off-by: David Wu
Acked-by: Philipp Tomsich
Reviewed-by: Philipp Tomsich -
The rv1108 GMAC only support rmii interface, so need to add the
set_rmii() ops. Use the phy current interface to set rmii or
rgmii ops. At the same time, need to set the mac clock rate of
rmii with 50M, the clock rate of rgmii with 125M.Signed-off-by: David Wu
Acked-by: Philipp Tomsich
Reviewed-by: Philipp Tomsich
