21 Feb, 2014
1 commit
19 Feb, 2014
2 commits
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Add the SATA boot support for OMAP5 and dra7xx.
Renamed the omap_sata_init to the common init_sata(int dev)
for commonality in with sata stack.Added the ROM boot device ID for SATA.
Signed-off-by: Dan Murphy
Reviewed-by: Roger Quadros
Signed-off-by: Tom Rini -
Enables support for SPI SPL, QSPI and Spansion serial flash device
on the EVM. Configures pin muxes for QSPI mode.Signed-off-by: Sourav Poddar
Reviewed-by: Jagannadha Sutradharudu Teki
18 Feb, 2014
1 commit
08 Feb, 2014
2 commits
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Add a README to the board which lists the commands required to enable
booting from the eMMC boot partitions found on the board.Cc: Lokesh Vutla
Signed-off-by: Tom Rini
Signed-off-by: Pantelis Antoniou -
Add a README to the board which lists the commands required to enable
booting from the eMMC boot partitions found on the board.Signed-off-by: Tom Rini
Signed-off-by: Pantelis Antoniou
25 Jan, 2014
1 commit
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This patch enables dynamically powering down the
IO receiver when not performing a read on DDR3 board.
This optimizes both active and standby power consumption.
This is derived from a patch that is done on AM335x[1][1] http://arago-project.org/git/projects/?p=u-boot-am33x.git;a=commit;h=6a9ee4bc72ece53fabf01825605fba3d71d5feb2
Signed-off-by: Lokesh Vutla
24 Jan, 2014
1 commit
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The commit
f3f98bb0 : "ARM: OMAP4/5: Do not configure non essential pads, clocks, dplls"
removed the config option aimed towards moving that stuff into kernel, which
renders some code unreachable. Remove that code.Signed-off-by: Jassi Brar
08 Jan, 2014
1 commit
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Byte offset of Ethernet mac address read from e-fuse are wrong so DHCP is
not working on some boards, modifying the offset to read properly.Signed-off-by: Mugunthan V N
19 Dec, 2013
8 commits
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GP EVM has 1GB DDR3 attached(Part no: MT41K512M8RH).
Adding details for the same.
Below is the brief description of DDR3 init sequence(SW leveling):
-> Enable VTT regulator
-> Configure VTP
-> Configure DDR IO settings
-> Disable initialization and refreshes until EMIF registers are programmed.
-> Program Timing registers
-> Program leveling registers
-> Program PHY control and Temp alert and ZQ config registers.
-> Enable initialization and refreshes and configure SDRAM CONFIG registerSigned-off-by: Lokesh Vutla
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AM4372 EPOS EVM has 1GB LPDDR2(Part no: MT42L256M32D2LG-25 WT:A)
Adding LPDDR2 init sequence and register details for the same.
Below is the brief description of LPDDR2 init sequence:
-> Configure VTP
-> Configure DDR IO settings
-> Disable initialization and refreshes until EMIF registers are programmed.
-> Program Timing registers
-> Program PHY control and Temp alert and ZQ config registers.
-> Enable initialization and refreshes and configure SDRAM CONFIG register
-> Wait till initialization is complete and the configure MR registers.Signed-off-by: Lokesh Vutla
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Currently same value is programmed for all ioregs. This is not
the case for all SoC's like AM4372. So adding a structure for ioregs
and updating in all board files. And also return from config_cmd_ctrl()
and config_ddr_data() functions if data is not passed.Signed-off-by: Lokesh Vutla
[trini: Fixup dxr2, cm_t335, adapt pcm051 rev3]
Signed-off-by: Tom Rini -
Updating the Multiplier and Dividers value for all DPLLs.
Safest OPP is read from DEV ATTRIBUTE register. Accoring to the value
returned the MPU DPLL is locked.
At different OPPs follwoing are the MPU locked frequencies.
OPP50 300MHz
OPP100 600MHz
OPP120 720MHz
OPPTB 800MHz
OPPNT 1000MHz
According to the latest DM following is the OPP table dependencies:
VDD_CORE VDD_MPU
OPP50 OPP50
OPP50 OPP100
OPP100 OPP50
OPP100 OPP100
OPP100 OPP120
So at different OPPs of MPU it is safest to lock CORE at OPP_NOM.
Following are the DPLL locking frequencies at OPP NOM:
Core locks at 1000MHz
Per locks at 960MHz
LPDDR2 locks at 266MHz
DDR3 locks at 400MHzTouching AM33xx files also to get DPLL values specific to board but no
functionality difference.
Signed-off-by: Lokesh Vutla -
Updating the mux data for UART, adding data for i2c0 and mmc.
And also updating pad_signals structure.Signed-off-by: Lokesh Vutla
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CONFIG_ENV_VARS_UBOOT_CONFIG, CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG and
CONFIG_BOARD_LATE_INIT is already set. Adding support to detect the
board. These variables are used by findfdt.Signed-off-by: Sekhar Nori
Signed-off-by: Lokesh Vutla -
Add support for reading onboard EEPROM to enable
board detection.Signed-off-by: Sekhar Nori
Signed-off-by: Lokesh Vutla -
Use ti_armv7_common.h config file to inclde the common
configs.Signed-off-by: Lokesh Vutla
11 Dec, 2013
1 commit
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Conflicts:
arch/arm/cpu/armv7/rmobile/Makefile
doc/README.scrapyardNeeded manual fix:
arch/arm/cpu/armv7/omap-common/Makefile
board/compulab/cm_t335/u-boot.lds
07 Dec, 2013
1 commit
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Current LDS files /DISCARD/ a lot of sections when linking ELF
files, causing diagnostic tools such as readelf or objdump to
produce partial output. Keep all section at link stage, filter
only at objcopy time so that .bin remains minimal.Signed-off-by: Albert ARIBAUD
Reviewed-by: Benoît Thébaudeau
05 Dec, 2013
1 commit
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Signed-off-by: Hardik Patel
04 Dec, 2013
3 commits
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The evm has a SATA port. Enable SATA configuration and
inititialize the SATA controller.Signed-off-by: Roger Quadros
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The uevm has a SATA port. Inititialize the SATA controller.
Signed-off-by: Roger Quadros
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Based on the definitive guide to EMIF configuration[1] certain registers
that we have been modifying (and are documented registers) should be
left in their reset values rather than modified. This has been tested
on AM335x GP EVM and Beaglebone White.[1]: http://processors.wiki.ti.com/index.php/AM335x_EMIF_Configuration_tips
Cc: Enric Balletbo i Serra
Cc: Javier Martinez Canillas
Cc: Heiko Schocher
Cc: Lars Poeschel
Signed-off-by: Tom Rini
Tested-by: Matt Porter
25 Nov, 2013
1 commit
22 Nov, 2013
1 commit
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GPMC controller is common IP to interface with both NAND and NOR flash devices.
Also, it supports max 8 chip-selects, which can be independently connected to
any of the devices.
But ROM code expects the boot-device to be connected to only chip-select[0].
Thus to resolve conflict between NOR and NAND boot. This patch:
- combines NOR and NAND configs spread in board files to common gpmc_init()
- configures GPMC based on boot-mode selected for SPL boot.Signed-off-by: Pekon Gupta
18 Nov, 2013
2 commits
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Signed-off-by: Masahiro Yamada
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Signed-off-by: Masahiro Yamada
13 Nov, 2013
1 commit
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- add omap24xx driver to new multibus/multiadpater support
- adapted all config files, which uses this driverTested on the am335x based siemens boards rut, dxr2 and pxm2
posted here:
http://patchwork.ozlabs.org/patch/263211/Signed-off-by: Heiko Schocher
Tested-by: Tom Rini
Cc: Lars Poeschel
Cc: Steve Sakoman
Cc: Thomas Weber
Cc: Tom Rix
Cc: Grazvydas Ignotas
Cc: Enric Balletbo i Serra
Cc: Luca Ceresoli
Cc: Igor Grinberg
Cc: Ilya Yanok
Cc: Stefano Babic
Cc: Nishanth Menon
Cc: Pali Rohár
Cc: Peter Barada
Cc: Nagendra T S
Cc: Michael Jones
Cc: Raphael Assenat
Acked-by: Igor Grinberg
Acked-by: Stefano Babic
12 Nov, 2013
1 commit
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Signed-off-by: Tom Rini
10 Nov, 2013
1 commit
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Conflicts:
arch/arm/cpu/arm926ejs/mxs/Makefile
board/compulab/cm_t35/Makefile
board/corscience/tricorder/Makefile
board/ppcag/bg0900/Makefile
drivers/bootcount/Makefile
include/configs/omap4_common.h
include/configs/pdnb3.hMakefile conflicts are due to additions/removals of
object files on the ARM branch vs KBuild introduction
on the main branch. Resolution consists in adjusting
the list of object files in the main branch version.
This also applies to two files which are not listed
as conflicting but had to be modified:board/compulab/common/Makefile
board/udoo/Makefileinclude/configs/omap4_common.h conflicts are due to
the OMAP4 conversion to ti_armv7_common.h on the ARM
side, and CONFIG_SYS_HZ removal on the main side.
Resolution is to convert as this icludes removal of
CONFIG_SYS_HZ.include/configs/pdnb3.h is due to a removal on ARM side.
Trivial resolution is to remove the file.Note: 'git show' will also list two files just because
they are new:include/configs/am335x_igep0033.h
include/configs/omap3_igep00x0.h
02 Nov, 2013
1 commit
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There is a board-specific portion for calling watchdog enable itself, in
main U-Boot.Signed-off-by: Tom Rini
01 Nov, 2013
1 commit
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Signed-off-by: Masahiro Yamada
Cc: Tom Rini
23 Oct, 2013
1 commit
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commit bba679144d25b91bcd7befff5a96728a30875f54
"usb: rename board_usb_init_type to usb_init_type" missed xhci-omap.c
So, fix that patch here, and fix a checkpatch warning.
WARNING: Avoid unnecessary line continuationsSigned-off-by: Troy Kisky
21 Oct, 2013
6 commits
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This paramter will later be used to initialize OTG ports in
host or device mode.Signed-off-by: Troy Kisky
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Move the MAC creation from the USB init to an function
that is called on every boot. This will then populate the
usbethaddr mac that kernel driver can pick up from the
device tree blob.Signed-off-by: Dan Murphy
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Add the support for the dra7xx xhci usb host.
dra7xx does not contain an EHCI controller so the headers
can be removed from the board file.The xHCI host on dra7xx is connected to a usb2 phy so need to
add support to enable those clocks.Signed-off-by: Dan Murphy
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Recent patches declares board_usb_init function prototype for a new
usb architecture.Turning on the OMAP_XHCI defines cause a redefinition compiler failure.
So update the board_usb_init to the latest prototype.Signed-off-by: Dan Murphy
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This commit unifies board-specific USB initialization implementations
under one symbol (usb_board_init), declaration of which is available in
usb.h.New API allows selective initialization of USB controllers whenever needed.
Signed-off-by: Mateusz Zalega
Signed-off-by: Kyungmin Park
Reviewed-by: Lukasz Majewski
Cc: Marek Vasut
Cc: Lukasz Majewski -
Add the call back into the board file for to enable
the SMPS10 VBUS regulator.Signed-off-by: Dan Murphy
15 Oct, 2013
1 commit
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Signed-off-by: Wolfgang Denk
