Eric Lee / smarc-uboot

24 May, 2018

1 commit

  • 9b0888ced   twister: Let SPL load U-Boot from MMC ... Browse Code »

    MMC is not initialized in SPL, so it cannot load u-boot.img
    preventing boot from MMC.

    Also driver specific functions are guarded with generic
    configuration options which leads to build failures when device
    driver is not enabled in config. Fix that by using driver
    specific defines.

    Signed-off-by: Ladislav Michl
    Acked-by: Stefano Babic

    Ladislav Michl
     

20 May, 2018

3 commits

19 May, 2018

1 commit

18 May, 2018

7 commits

17 May, 2018

7 commits

14 May, 2018

3 commits

  • e6f61622d   ARM: mvebu: a38x: restore support for setting timing ... Browse Code »

    This restores support for configuring the timing mode based on the
    ddr_topology. This was originally implemented in commit 90bcc3d38d2b
    ("driver/ddr: Add support for setting timing in hws_topology_map") but
    was removed as part of the upstream sync.

    Signed-off-by: Chris Packham
    Signed-off-by: Stefan Roese

    Chris Packham
     
  • 2b4ffbf6b   ARM: mvebu: a38x: sync ddr training code with upstream ... Browse Code »

    This syncs drivers/ddr/marvell/a38x/ with the mv_ddr-armada-17.10 branch
    of https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git.

    The upstream code is incorporated omitting the ddr4 and apn806 and
    folding the nested a38x directory up one level. After that a
    semi-automated step is used to drop unused features with unifdef

    find drivers/ddr/marvell/a38x/ -name '*.[ch]' | \
    xargs unifdef -m -UMV_DDR -UMV_DDR_ATF -UCONFIG_DDR4 \
    -UCONFIG_APN806 -UCONFIG_MC_STATIC \
    -UCONFIG_MC_STATIC_PRINT -UCONFIG_PHY_STATIC \
    -UCONFIG_64BIT

    INTER_REGS_BASE is updated to be defined as SOC_REGS_PHY_BASE.

    Some now empty files are removed and the ternary license is replaced
    with a SPDX GPL-2.0+ identifier.

    Signed-off-by: Chris Packham
    Signed-off-by: Stefan Roese

    Chris Packham
     
  • 80af1a9ef   arm64: mvebu: Add basic support for the Turris Mox board ... Browse Code »

    This adds basic support for the Turris Mox board from CZ.NIC, which is
    currently being crowdfunded on Indiegogo.

    Turris Mox is as modular router based on the Armada 3720 SOC (same as
    EspressoBin).

    The basic module can be extended by different modules. The device tree
    binary for the kernel can be dependent on which modules are connected,
    and in what order. Because of this, the board specific code creates
    in U-Boot a variable called module_topology, which carries this
    information.

    Signed-off-by: Marek Behun
    Signed-off-by: Stefan Roese

    Marek Behún
     

12 May, 2018

2 commits

11 May, 2018

16 commits

  • 3b52847a4   Merge tag 'xilinx-for-v2018.07' of git://www.denx.de/git/u-boot-microblaze ... Browse Code »
    15

    Xilinx changes for v2018.07

    microblaze:
    - Align defconfig

    zynq:
    - Rework fpga initialization and cpuinfo handling

    zynqmp:
    - Add ZynqMP R5 support
    - Wire and enable watchdog on zcu100-revC
    - Setup MMU map for DDR at run time
    - Show board info based on DT and cleanup IDENT_STRING

    zynqmp tools:
    - Add read partition support
    - Add initial support for Xilinx bif format for boot.bin generation

    mmc:
    - Fix get_timer usage on 64bit cpus
    - Add support for SD3.0 UHS mode

    nand-zynq:
    - Add support for 16bit buswidth
    - Use address cycles from onfi params

    scsi:
    - convert ceva sata to UCLASS_AHCI

    timer:
    - Add Cadence TTC for ZynqMP r5

    watchdog:
    - Minor cadence driver cleanup

    Tom Rini
     
  • c590e62d3   Merge git://git.denx.de/u-boot-fsl-qoriq Browse Code »
    Tom Rini
     
  • d1f4e39d5   mmc: zynq_sdhci: Add support for SD3.0 ... Browse Code »
    17

    This patch adds support of SD3.0 for ZynqMP.

    Signed-off-by: Siva Durga Prasad Paladugu
    Signed-off-by: Michal Simek

    Siva Durga Prasad Paladugu
     
  • 1d6c54ecb   arm: zynqmp: Add ZynqMP minimal R5 support ... Browse Code »

    Xilinx ZynqMP also contains dual Cortex R5 which can run U-Boot.
    This patch is adding minimal support to get U-Boot boot.
    U-Boot on R5 runs out of DDR with default configuration that's why
    DDR needs to be partitioned if there is something else running on arm64.
    Console is done via Cadence uart driver and the first Cadence Triple
    Timer Counter is used for time.

    This configuration with uart1 was tested on zcu100-revC.

    U-Boot 2018.05-rc2-00021-gd058a08d907d (Apr 18 2018 - 14:11:27 +0200)

    Model: Xilinx ZynqMP R5
    DRAM: 512 MiB
    WARNING: Caches not enabled
    MMC:
    In: serial@ff010000
    Out: serial@ff010000
    Err: serial@ff010000
    Net: Net Initialization Skipped
    No ethernet found.
    ZynqMP r5>

    There are two ways how to run this on ZynqMP.
    1. Run from ZynqMP arm64
    tftpb 20000000 u-boot-r5.elf
    setenv autostart no && bootelf -p 20000000
    cpu 4 disable && cpu 4 release 10000000 lockstep
    or
    cpu 4 disable && cpu 4 release 10000000 split

    2. Load via jtag when directly to R5

    Signed-off-by: Michal Simek

    Michal Simek
     
  • 0478b0b9b   arm64: zynqmp: Simplify boot_target variable composition ... Browse Code »

    Call calloc for space allocation only at one location and include if/else
    to sprintf. This will simplify run time device adding based on id aliases.

    Signed-off-by: Michal Simek
    Reviewed-by: Alexander Graf

    Michal Simek
     
  • 0678941ae   arm64: zynqmp: Setup MMU map for DDR at run time ... Browse Code »

    This patch fills the MMU map for DDR at run time based on information read
    from Device Tree or automatically detected from static configuration.

    The patch is needed because for systems which has for example 1GB of memory
    but MMU map is 2GB there could be spurious accesses which was seen in past
    when mapping is not fitting with actual memory installed.

    Signed-off-by: Nitin Jain
    Signed-off-by: Siva Durga Prasad Paladugu
    Signed-off-by: Michal Simek

    Nitin Jain
     
  • 4490e013e   arm64: zynqmp: Wire watchdog internals ... Browse Code »

    Enable watchdog in full U-Boot.

    Similar changes were done by:
    "arm: zynq: Wire watchdog internals"
    (sha1: e6cc3b25d721c3001019f8b44bfaae2a57255162)

    Signed-off-by: Michal Simek

    Michal Simek
     
  • e00656b2a   arm64: zynqmp: Reset FPD Watchdog on zcu100 ... Browse Code »

    Low level configuration didn't reset FPD Watchdog that's why accessing
    it caused u-boot hang.

    Signed-off-by: Michal Simek

    Michal Simek
     
  • 04ab29ab2   arm64: zynqmp: Add new defconfig for zc1275 revB ... Browse Code »

    This patch enables support zc1275 revB board. It has
    SD added compared to revA. The same configuration will
    work for RevC boards aswell.

    Signed-off-by: Siva Durga Prasad Paladugu
    Signed-off-by: Michal Simek

    Siva Durga Prasad Paladugu
     
  • 0b4b82ad1   arm: zynq: Remove checkboard and enable DISPLAY_CPUINFO ... Browse Code »

    Now that showing silicon version is part of the CPU
    info display, let's remove checkboard().

    Note that the generic show_board_info() will still
    show the DT 'model' property. For instance:

    U-Boot 2018.05-rc2-00025-g611b3ee0159b (Apr 19 2018 - 11:23:12 +0200)

    CPU: Zynq 7z045
    Silicon: v1.0
    Model: Zynq ZC706 Development Board
    I2C: ready

    Based on patches from Ariel D'Alessandro ,
    and Ezequiel Garcia

    mini configuration doesn't need to show this information.

    Signed-off-by: Michal Simek

    Michal Simek
     
  • 4aba5fb85   arm: zynq: Rework FPGA initialization ... Browse Code »
    15

    This commit moves the FPGA descriptor definition
    to mach-zynq, where it makes more sense.

    Based on patches from Ariel D'Alessandro
    and Ezequiel Garcia

    Signed-off-by: Michal Simek

    Michal Simek
     
  • f739fcd83   SPDX: Convert a few files that were missed before ... Browse Code »

    As part of the main conversion a few files were missed. These files had
    additional whitespace after the '*' and before the SPDX tag and my
    previous regex was too strict. This time I did a grep for all SPDX tags
    and then filtered out anything that matched the correct styles.

    Fixes: 83d290c56fab ("SPDX: Convert all of our single license tags to Linux Kernel style")
    Reported-by: Heinrich Schuchardt
    Signed-off-by: Tom Rini

    Tom Rini
     
  • 53deb24dd   board/freescale: Remove invalid fsl email addresses ... Browse Code »

    These fsl email addresses are no longer valid and they do not have a
    correspondent nxp.com entry.

    Remove all invalid fsl email addresses and mark the boards as orphan.

    Signed-off-by: Fabio Estevam

    Fabio Estevam
     
  • ba74491e2   p1022ds: Change Timur's email address ... Browse Code »

    timur@freescale.com is not a valid email for quite some time, so change
    it to Timur's updated email.

    Signed-off-by: Fabio Estevam
    Acked-by: Timur Tabi

    Fabio Estevam
     
  • 2dbd5cd96   bootcount: display5: spl: Extend DISPLAY5 board SPL to support bootcount checking ... Browse Code »

    This patch is necessary for providing basic bootcount checking in the case
    of using "falcon" boot mode in that board.

    It forces u-boot proper boot, when we exceed the number of errors.

    Signed-off-by: Lukasz Majewski
    Reviewed-by: Stefan Roese

    Lukasz Majewski
     
  • 71cb3d7c7   apalis_t30: fix optional pcie port reset for reliable pcie operation ... Browse Code »

    Allow optionally bringing up the Apalis type specific 4 lane PCIe port
    as well as the PCIe switch as found on the Apalis Evaluation board. In
    order to avoid violating the PCIe reset timing do this by overriding the
    tegra_pcie_board_port_reset() function. Note however that both the
    Apalis type specific 4 lane PCIe port as well as the regular Apalis PCIe
    port are also left disabled in the device tree by default.

    Signed-off-by: Marcel Ziswiler
    Acked-by: Stephen Warren
    Signed-off-by: Tom Warren

    Marcel Ziswiler