10 May, 2017
1 commit
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A wrong config name is used for QSPI boot, it causes IVT offset wrong.
Fix the typo issue.Signed-off-by: Ye Li
09 May, 2017
1 commit
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Use CONFIG_DM_USB to comment out USB setup functions used by non-DM driver. So
they won't be executed when using DM driver.These USB setup functions may setup power control pins to USB_PWR function not GPIO,
which is different as the GPIO function used by USB vbus-supply. And cause the power control
not work.Signed-off-by: Ye Li
08 May, 2017
1 commit
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The recent ehci-mx6 driver can support vbus-supply property, no need
to request io expander pins in usb setup. If did this, the regulator
for vbus-supply will fail to get due to the pin is occupied.Signed-off-by: Ye Li
04 May, 2017
1 commit
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Commit:894a4b4da7e2 add the voltage configuration macro that base on
the 0.1mV precision, and i.MX6UL/i.MX6ULL/i.MX7D use the macro as 1mV
prevision that cause the conversion are wrong, then some boards cannot
boot up in ldo bypass mode.The patch just correct the usage of PFUZE3000_SW1AB_SETP().
Signed-off-by: Fugang Duan
03 May, 2017
1 commit
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For some i.MX6SL evk board, enet phy need reset.
Add phy reset before phy clock enable and init the
pinctrl earlier.Signed-off-by: Fugang Duan
29 Apr, 2017
5 commits
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Update mx6sxscm boards code and build configurations to enable
OF_CONTROL and DM drivers.1. Update GPIO codes for adding gpio request
2. Update PMIC and LDO by-pass codes for DM PMIC
3. Add lpddr2 512MB size and eMMC options tolocal Kconfig
4. Update license with NXP 2017
5. Add defconfigs for EVB boardsSigned-off-by: Juan Gutierrez
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Move the scm mx6sxscm board generic support code from v2016.03
as the base for converting to use DTB OF_CONTROLSigned-off-by: Juan Gutierrez
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1. set fdt_file according to board_rev which is set at runtime
2. Add macros for proper delimitation for different board builds
3. Fix and add proper iomux configurationSigned-off-by: Juan Gutierrez
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Update mx6dqscm boards code and build configurations to enable
OF_CONTROL and DM drivers.1. Update GPIO codes for adding gpio request
2. Enable USB DM driver
3. Update PMIC and LDO by-pass codes for DM PMIC
4. Add spinor boot support
5. Add lpddr2 modes, sizes and boards on local Kconfig
6. Update license with NXP 2017
7. Add defconfigs for qwks boardsSigned-off-by: Juan Gutierrez
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Move the scm mx6dqscm board generic support code from v2016.03
as the base for converting to use DTB OF_CONTROL.Signed-off-by: Juan Gutierrez
21 Apr, 2017
1 commit
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VGEN3 and VGEN5 have been fused the right value in PF0100 on i.mx6qp board,
so software didn't need to change their voltage output anymore. Otherwise,
VGEN3 will be wrongly updated from 1.8v to 2.8v.Signed-off-by: Robin Gong
(cherry picked from commit 6f7f185664a401f03f6ce6c81b996c1f27fdbe73)
Signed-off-by: Ye Li
06 Apr, 2017
3 commits
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The CONFIG_SYS_USE_NAND is not used in v2017.03. We have to replace it
by other NAND configurations, like CONFIG_CMD_NAND or CONFIG_NAND_MXS.Signed-off-by: Ye Li
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The button pad setting is missed during cherry-pick.
Signed-off-by: Ye Li
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add splash screen feature for epdc.
it's tested on imx6sll arm2 board and evk board.Signed-off-by: Robby Cai
(cherry picked from commit c85c6f2a0f08dfc6c2859fe969b2021ab32b9370)
Signed-off-by: Ye Li
05 Apr, 2017
26 commits
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To improve the performance, enable the bank interleave for DDR3. Update
the DDR3 settings to new script IMX7D_DDR3_533MHz_1GB_32bit_V2.0.dsChanges:
1. Enable bank interleave
2. Improve the drive strength for non-TO1.1 chips.
3. Updates ZQ_CON0 settings.
4. For 19x19 DDR3 ARM2 and 12x12 DDR3 ARM2, they are using old version scripts which
were not upgrade with SABRESD script. According to DDR owner suggestion, to use same version
script for all of them.File:
http://compass.freescale.net/livelink/livelink?func=ll&objid=233861153&objAction=browse&sort=name&viewType=1Test:
Passed stress test on one TO1.2 SABRESD, one TO1.1 SABRESD and one TO1.0 SABRESD.
Passed stress test on one 12x12 ddr3 ARM2.Signed-off-by: Ye Li
(cherry picked from commit 62e73b45c53e3302d869c373da72699199b90648) -
To improve the performance, enable the bank interleave for LPDDR3. Update
the LPDDR3 settings to new script IMX7D_LPDDR3_533MHz_2GB_32bit_V2.0.ds5.Changes:
1. Enable bank interleave
2. Improve the drive strength for non-TO1.1 chips.
3. Updates ZQ_CON0 settings.
4. Change to 0 for reserved bits.File:
http://compass.freescale.net/livelink/livelink?func=ll&objid=233861153&objAction=browse&sort=name&viewType=1Test:
Passed stress test on one 19x19 lpddr3 arm2 and one 12x12 lpddr3 arm2.
Passed LPSR test on one 12x12 lpddr3 arm2.Signed-off-by: Ye Li
(cherry picked from commit 9a4fa3f8d2762791a76fd90e83feec8c8c9235b0) -
Update lpddr2 settings to latest version
IMX6UL_LPDDR2_400MHz_16bit_V1.1.incUse pre-charge command 0x1 per DDR register programming aid
Signed-off-by: Adrian Alonso
(cherry picked from commit e7aa25c2c7313b00475e3e0ce394a2fbaa569fbd) -
Update lpddr2 settings to latest version
MX6SL_MMDC_LPDDR2_register_programming_aid_v0.9.incUse pre-charge command 0x1 per DDR register programming aid
Signed-off-by: Adrian Alonso
(cherry picked from commit 7c15f3afbd2cfa97b14a0013ef959e9e73fd2f1e) -
LPDDR2 script MX6SL_MMDC_LPDDR2_register_programming_aid_v0.9.inc
Updated to add Precharge all command per JEDEC
The memory controller may optionally issue a precharge-all command
prior to the MRW reset command
This is strongly recommended to ensure robust DRAM initializationSigned-off-by: Adrian Alonso
Signed-off-by: Ye Li
(cherry picked from commit 498f4a791593069220213c6d777527f4d899fb8a) -
- Adjust ZQ delay for MMDC clock frequency at 400MHz
- Precharge all commands per JEDEC
The memory controller may optionally issue a Precharge-All command
prior to the MRW Reset command, this is strongly recommended to ensure
a robust DRAM initializationDDR Calibration script:
http://sw-stash.freescale.net/projects/IMX/repos/ddr-scripts-rel/commits/a72e010a1fd8c7fe0fda7bdc4d058c478e94c3daSigned-off-by: Adrian Alonso
(cherry picked from commit 03cc626df73d6c2bb36daf280b1cd43170c298a0) -
Add fastboot and recovery mode support for mx6qarm
Signed-off-by: Adrian Alonso
(cherry picked from commit 505e899ce582118da28ca1f4487ce7f179225bd7) -
Add android features on i.MX7ULP EVK board.
Implement the code to get boot device and the serial number on mx7ulp.
TODO: will add the code which check misc partition after porting BCB.Change-Id: I9d06fecba303fa4dfdcaf73da1b6246444697bba
Signed-off-by: Sanshan Zhang
(cherry picked from commit 4c60cba3a017b921aebb84dd1268c898e549c99a)
Signed-off-by: Ye Li -
Add board level support for android fastboot feature. Each board has
a android specified header file for defining android related configuraitons.
And add build targets for their android uboot images building.For mx6qsabreauto, mx6sabresd and mx7dsabresd, we enable the android
fastboot exclusive with DFU.Signed-off-by: Ye Li
(cherry picked from commit 43fe988af28c5e51fb23aa846e04bc9698256926) -
Integrate the FSL android fastboot features into community's fastboot.
1. Use USB gadget g_dnl driver
2. Integrate the FSL SD/SATA/NAND flash operations, since the GPT and
EFI partitions are not support by i.MX.
3. Add FDT support to community's android image.
4. Add a new boot command "boota" for android image boot. The boota
implements to load ramdisk and fdt to their loading addresses
specified in boot.img header, while bootm won't do it for android image.
5. Support the authentication of boot.img at the "load_addr" for
both SD and NAND.
6. We use new configuration CONFIG_FSL_FASTBOOT for Freescale's fastboot
with relevant header file "fsl_fastboot.h". While disabling the
configuration, the community fastboot is used.
7. Overwrite the cmdline in boot.img by using bootargs saved in local environment.
8. Add recovery and reboot-bootloader support.Signed-off-by: Ye Li
(cherry picked from commit 23d63ff185929fff5e392efc853d69b606ba081a) -
Add the 10x10 ARM2 and 14x14 ARM2 DTS files. Also convert the board
codes to use OF_CONTROL and DM drivers.Since the DTS files only have UART and SD1 supported. So we only enable
the DM for these two modules. QSPI and USB are still kept in non-DM fashion.Signed-off-by: Ye Li
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Copy the mx7ulp ARM2 codes from v2016.03 as the base for using
OF_CONTROL and DM drivers.The 14x14 ARM2 LPDDR3 script is v1.5:
- IMX7ULP1_LPDDR3_320MHz_512MB_32bit_V1.5.incThe 10x10 ARM2 LPDDR2 script is v1.1:
- IMX7ULP1_LPDDR2_320MHz_1GB_32bit_V1.1.incSigned-off-by: Ye Li
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Add board_late_mmc_env_init to support MMC device detection for environment
variables.Signed-off-by: Ye Li
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Enable and setup board level codes for MIPI DSI splashscreen on EVK board.
User needs set env variable"panel=HX8363_WVGA" for displaying.Signed-off-by: Ye Li
(cherry picked from commit 49cb68f5c17e42f9290336e1252ace6ac7d0b5ce) -
Porting codes to support USB OTG0 on the EVK board. Convert
to use DM USB driver.Signed-off-by: Ye Li
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Porting the QSPI flash board support from v2016.03, and convert to use
DM QSPI driver.
Since we need to support QSPI at default in u-boot, change the default
DTS file to qspi enabled DTS.Signed-off-by: Ye Li
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Update LPDDR3 script from v1.2 to v1.4 EVK_IMX7ULP1_LPDDR3_320MHz_1GB_32bit_V1.4.inc
with the changes below:Version 1.3
-Update the precharge command to CMD=01 at the DDR initialization phase
Version 1.4
-remove unimplemented registers
Write data bit delay --refer to the DDR_TRIM bits in IOMUXC1_DDR_SW_PAD_CTL_PAD_DDRnFile:
http://compass.freescale.net/livelink/livelink?func=ll&objid=235761218&objAction=browse&sort=name&viewType=1Test:
One EVK board passes overnight stress test.Signed-off-by: Ye Li
(cherry picked from commit e3343cb38eac2cc69b58247b5adcb500e5f19834) -
For the current APLL setting, as we want the APLL PFD0 to meet DDR clock 320Mhz requirement.
We set MULT to 20, NUM to 4 and DENOM to 2, to get final 22 multiplier. But according to the RM,
the NUM should always be less than the DENOM. So our setting violates the rule.Actually the ROM has already set the MULT to 22 and leave NUM/DENOM in default value. The calculated APLL PFD0 clock
is 318.9888Mhz, which also meet the DDR requirement.
To fix the issue, we remove the PLL settings in DCD to use default value from ROM, and only set the PFD0 FRAC.Signed-off-by: Ye Li
(cherry picked from commit 8cc70b1ded5309dee522aa00b43bd702a209ba51) -
Add EVK board support.
Add the evk dts file.LOG:
U-Boot 2017.03-rc2-00038-gab86c1d (Feb 22 2017 - 15:59:58 +0800)CPU: Freescale i.MX7ULP rev1.0 at 500 MHz
Reset cause: POR
Boot mode: Dual boot
Model: NXP i.MX7ULP EVK
DRAM: 1 GiB
MMC: FSL_SDHC: 0
In: serial@402D0000
Out: serial@402D0000
Err: serial@402D0000
Net: Net Initialization Skipped
No ethernet found.
Hit any key to stop autoboot: 0Signed-off-by: Peng Fan
Cc: Stefano Babic -
Add 19x19 LPDDR2/LPDDR3/DDR3 ARM2 board supports.
Enable the OF_CONTROL and convert them to use DM driver. Since the DTB lacks
the support for some modules. We have to use QSPI and FEC with non-DM driver.Signed-off-by: Peng Fan
Signed-off-by: Ye Li -
Add 12x12 ddr3 arm2 board support and convert it to use OF_CONTROL and
DM drivers.Signed-off-by: Peng Fan
Signed-off-by: Ye Li -
Add mx7d 12x12 lpddr3 arm2 support, which has enabled the OF_CONTROL
and DM driversSigned-off-by: Peng Fan
Signed-off-by: Ye Li -
1. Add BMODE support
2. Update environment variables to align with v2016.03
3. Remove the wdog WCR bit 4 clear. Since we have implemented reset_cpu for mx7d.Signed-off-by: Ye Li
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Update LCD setup codes to use the parameters structure used for all
i.mx platforms, discard to use videmode environment variable.Signed-off-by: Ye Li
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Update ddr script and add plugin support.
Signed-off-by: Peng Fan
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Add nand/qspi build configurations for their boot support.
Also Add gpmi-nand and qspi specified DTS files for enable them.For QSPI, this patch changes it to use DM driver.
Signed-off-by: Peng Fan
Signed-off-by: Ye Li
