07 Jun, 2014
7 commits
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Porting below commit from linux-tree, preserving original authorship & commit log
commit bd9c6e99b58255b9de1982711ac9487c9a2f18be
Author: Brian Norris
mtd: nand: don't use read_buf for 8-bit ONFI transfersUse a repeated read_byte() instead of read_buf(), since for x16 buswidth
devices, we need to avoid the upper I/O[16:9] bits. See the following
commit for reference:commit 05f7835975dad6b3b517f9e23415985e648fb875 (from linux-tree)
Author: Uwe Kleine-König
Date: Thu Dec 5 22:22:04 2013 +0100mtd: nand: don't use {read,write}_buf for 8-bit transfers
Now, I think that all barriers to probing ONFI on x16 devices are
removed, so remove the check from nand_flash_detect_onfi().Signed-off-by: Pekon Gupta
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This patch
omap-elm.c: replaces -ve integer value returned during errorneous condition,
with proper error-codes.
omap-gpmc.c: updates omap-gpmc driver to pass error-codes returned from
omap-elm driver to upper layersSigned-off-by: Pekon Gupta
Reviewed-by: Stefan Roese -
This patch tries to avoid some local pointer dereferences, by using common
local variables in omap_correct_data_bch()Signed-off-by: Pekon Gupta
Reviewed-by: Stefan Roese -
This patch renames 'struct nand_bch_priv' which currently holds private data only
for BCH ECC schemes, into 'struct omap_nand_info' so that same can be used for
all ECC schemesSigned-off-by: Pekon Gupta
Reviewed-by: Stefan Roese -
This patch prepares to refactor 'struct nand_bch_priv' -> 'struct omap_nand_info'
And thus performs following clean-ups:
- remove nand_bch_priv.type: use nand_bch_priv.ecc_scheme instead
- remove nand_bch_priv.mode:Signed-off-by: Pekon Gupta
Reviewed-by: Stefan Roese -
ELM hardware engine support ECC error detection for multiple ECC strengths like
+------+------------------------+
|Type | ECC syndrome length |
+------+------------------------+
|BCH4 | 6.5 bytes = 13 nibbles |
|BCH8 | 13 byte = 26 nibbles |
|BCH16 | 26 bytes = 52 nibbles |
+------+------------------------+Current implementation of omap_elm driver uses ECC syndrom length (in 'nibbles')
to differentiate between BCH4/BCH8/BCH16. This patch replaces it with 'bch_type'Signed-off-by: Pekon Gupta
Reviewed-by: Stefan Roese -
There is no dependency of omap_elm.c on omap_gpmc.h
Signed-off-by: Pekon Gupta
Reviewed-by: Stefan Roese
02 Jun, 2014
1 commit
28 May, 2014
4 commits
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The current pmic i2c code assumes the current i2c bus is
the same as the pmic device's bus. There is nothing ensuring
that to be true. Therefore, select the proper bus before performing
a transaction.Signed-off-by: Aaron Durbin
Signed-off-by: Simon Glass
Acked-by: Heiko Schocher
Reviewed-by: Simon Glass
Signed-off-by: Minkyu Kang -
This adds driver support for the TPS65090 PMU. Support includes
hooking into the pmic infrastructure so that the pmic commands
can be used on the console. The TPS65090 supports the following
functionality:- fet enable/disable/querying
- getting and setting of charge stateEven though it is connected to the pmic infrastructure it does
not hook into the pmic charging charging infrastructure.The device tree binding is from Linux, but only a small subset of
functionality is supported.Signed-off-by: Tom Wai-Hong Tam
Signed-off-by: Hatim Ali
Signed-off-by: Katie Roberts-Hoffman
Signed-off-by: Rong Chang
Signed-off-by: Sean Paul
Signed-off-by: Vincent Palatin
Signed-off-by: Aaron Durbin
Signed-off-by: Simon Glass
Signed-off-by: Minkyu Kang -
This enum should be common across all PMICs rather than having it
independently defined with the same name in multiple places.Signed-off-by: Simon Glass
Signed-off-by: Minkyu Kang -
Commit be3b51aa did this mostly, but several have been added since. Do the
job again.Signed-off-by: Simon Glass
Acked-by: Lukasz Majewski
Signed-off-by: Minkyu Kang
27 May, 2014
2 commits
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Signed-off-by: Josh Wu
[fix checkpatch line length warning]
Signed-off-by: Andreas Bießmann -
We need check the NULL pointer as at91_pio_get_port() may return NULL.
Also print a error message when at91_pio_get_port() failed otherwise we
cannot notice the failure.Signed-off-by: Josh Wu
Signed-off-by: Andreas Bießmann
25 May, 2014
5 commits
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The correct value for this setting can vary across SoCs and boards, so make it
configurable.Also reduce the default value to 8, which is the same default as used in the
Linux driver.Signed-off-by: Ian Campbell
Cc: Alexey Brodkin -
On Thu, 2014-05-08 at 22:26 +0100, Ian Campbell wrote:
> The {r,t}xbuffs fields also need to be aligned. Previously this was done
> implicitly because they immediately followed the descriptor tables. Make this
> explicit and also move to the head of the struct.Looks like I managed to not actually commit the move of the field to the
head of the struct! v3.1 follows....Ian.
8From 2937ba01841887317f6792709ed57cb86b5fc0cd Mon Sep 17 00:00:00 2001
From: Ian Campbell
Date: Thu, 1 May 2014 19:45:15 +0100
Subject: [PATCH] net/designware: reorder struct dw_eth_dev to pack more
efficiently.The {tx,rx}_mac_descrtable fields are aligned to ARCH_DMA_MINALIGN, which could
be 256 or even larger. That means there is a potentially huge hole in the
struct before those fields, so move them to the front where they are better
packed.Moving them to the front also helps ensure that so long as dw_eth_dev is
properly aligned (which it is since "net/designware: ensure device private data
is DMA aligned.") the {tx,rx}_mac_descrtable will be too, or at least avoids
having to worry too much about compiler specifics.The {r,t}xbuffs fields also need to be aligned. Previously this was done
implicitly because they immediately followed the descriptor tables. Make this
explicit and also move to the head of the struct.Signed-off-by: Ian Campbell
Cc: Alexey Brodkin
Tested-by: Siarhei Siamashka
Reviewed-by: Siarhei Siamashka -
This is required at least on ARM.
When sending instead of simply invalidating the entire descriptor, flush
as little as possible while still respecting ARCH_DMA_MINALIGN, as
requested by Alexey.Signed-off-by: Ian Campbell
Cc: Alexey Brodkin -
struct dw_eth_dev contains fields which are accessed via DMA, so make sure it
is aligned to a dma boundary. Without this I see:
ERROR: v7_dcache_inval_range - start address is not aligned - 0x7fb677e0Signed-off-by: Ian Campbell
Reviewed-by: Alexey Brodkin
Acked-by: Marek Vasut -
On Mon, 2014-05-05 at 14:18 +0200, Stefan Roese wrote:
> > + case 1:
> > +#if CONFIG_MMC1_PG> Are you sure that this is correct and shouldn't be:
>
> +#ifdef CONFIG_MMC1_PG
>
> ?It's "correct" in so far as it works (the boards.cfg config stuff
#defines things to 1), but I think you are right that it isn't the
preferred style. But...> A quick scan through this patch series shows that this define
> is not set at all. Perhaps its outdated? Or is it used to support
> some other sunxi SoC? Not sure, perhaps it should be removed for
> now....I had thought that it was to support some other board which wasn't
being upstreamed right now, so eventually useful and harmless for now,
but I've just checked and it isn't actually used by any of the boards in
u-boot-sunxi.git. So rather than fix it to use #ifdef lets drop it.
Rather than resend the entire series, here is v5.1 of this patch.> Other than this please add my:
>
> Reviewed-by: Stefan RoeseThanks!
8From 20704e35a41664de5f516ed0e02981ac06085102 Mon Sep 17 00:00:00 2001
From: Ian Campbell
Date: Fri, 7 Mar 2014 04:29:39 +0000
Subject: [PATCH v5.1 7/8] sunxi: mmc supportThis adds support for the MMC controller on the Allwinner A20 (sun7i)
processor.Signed-off-by: Henrik Nordstrom
Signed-off-by: Luke Leighton
Signed-off-by: Oliver Schinagl
Signed-off-by: Wills Wang
Signed-off-by: Ian Campbell
Reviewed-by: Marek Vasut
Reviewed-by: Stefan Roese
Cc: Tom Cubie
Cc: Aaron Maoye
Cc: Pantelis Antoniou
Reviewed-by: Tom Rini
24 May, 2014
1 commit
23 May, 2014
10 commits
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In 7168977 we made calls to check_and_invalidate_dcache_range()
conditional on !CONFIG_SYS_FSL_ESDHC_USE_PIO. Only define this function
in this case as well.Signed-off-by: Tom Rini
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This enables specifying which eMMC HW partition to target for any U-Boot
command that uses the generic get_partition() function to parse its
command-line arguments.Acked-by: Pantelis Antoniou
Signed-off-by: Stephen Warren -
This patch adds functions for read, write and authentication
key programming for the Replay Protected Memory Block partition
in the eMMC.Acked-by: Pantelis Antoniou
Signed-off-by: Pierre Aubert -
MMC switch command for unsupported feature (e.g. bus width) sets a switch
error bit in card status. This bit should be checked, and, if it's set,
no access with new controller settings should be performed.Acked-by: Pantelis Antoniou
Signed-off-by: Andrew Gabbasov -
mmc_init() doesn't call get_timer() anymore if MMC is already
initialized.Minor formatting fix.
Acked-by: Pantelis Antoniou
Signed-off-by: Mateusz Zalega
22 May, 2014
1 commit
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When configure the fsl_esdhc driver to PIO mode by defining
"CONFIG_SYS_FSL_ESDHC_USE_PIO", the SD/MMC read and write will fail.Two bugs in the driver to cause the issue:
1. The read buffer was invalidated after reading from DATAPORT register,
which should be only applied to DMA mode. The valid data in cache was
overwritten by physical memory.
2. The watermarks are not set in PIO mode, will cause according state not
be set.Acked-by: Pantelis Antoniou
Signed-off-by: Ye.Li
20 May, 2014
4 commits
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Added support to load a bitstream image in chunks by reading it in
chunks from SD/MMC.
Command format:
loadfs [dev] [address] [image size] [blocksize]
[]
Example: fpga loadfs 0 1000000 3dbafc 4000 mmc 0 fpga.binSigned-off-by: Siva Durga Prasad Paladugu
Signed-off-by: Michal Simek -
Do not do partial bitstream detection based on bitstream
size and use bitstream_type argument which is passed
from the fpga core.Signed-off-by: Michal Simek
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Clean up partial, full and compressed bitstream handling.
U-Boot supports full bitstream loading and partial
based on detection which is not 100% correct.
Extending fpga_load/fpga_loadbitstream() with one more
argument which stores bitstream type.Signed-off-by: Michal Simek
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Conflicts:
boards.cfgConflicts were trivial once u-boot-arm/master boards.cfg was
reformatted (commit 6130c146) to match u-boot/master's own
reformatting (commit 1b37fa83).
17 May, 2014
4 commits
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Define and use CONTROL_REGISTER_W1C_MASK to make sure that
w1c bits of usb control register do not get reset while
writing any other bitSigned-off-by: Nikhil Badola
Signed-off-by: Ramneek Mehresh
Reviewed-by: York Sun -
By default, all PEX inbound windows PEX_PEXIWARn[TRGT] are
mapped to 0xF, which is local memory. But for BSC9132, 0xF
is CCSR, 0x0 is local memory.Signed-off-by: Minghuan Lian
Signed-off-by: Chunhe Lan
Reviewed-by: York Sun -
This patch adds support for VSC8664 PHY module which can
be found on Freescale's T4240RDB boards.Signed-off-by: Chunhe Lan
Reviewed-by: York Sun
16 May, 2014
1 commit