08 Mar, 2014

3 commits

  • T2080PCIe-RDB is a Freescale Reference Design Board that hosts the T2080 SoC.
    It works in two mode: standalone mode and PCIe endpoint mode.

    T2080PCIe-RDB Feature Overview
    ------------------------------
    Processor:
    - T2080 SoC integrating four 64-bit dual-threads e6500 cores up to 1.8GHz
    DDR Memory:
    - Single memory controller capable of supporting DDR3 and DDR3-LP devices
    - 72bit 4GB DDR3-LP SODIMM in slot
    Ethernet interfaces:
    - Two 10M/100M/1G RGMII ports on-board
    - Two 10Gbps SFP+ ports on-board
    - Two 10Gbps Base-T ports on-board
    Accelerator:
    - DPAA components consist of FMan, BMan, QMan, PME, DCE and SEC
    SerDes 16 lanes configuration:
    - SerDes-1 Lane A-B: to two 10G XFI fiber (MAC9 & MAC10)
    - SerDes-1 Lane C-D: to two 10G Base-T (MAC1 & MAC2)
    - SerDes-1 Lane E-H: to PCIe Goldfinger (PCIe4 x4, Gen3)
    - SerDes-2 Lane A-D: to PCIe Slot (PCIe1 x4, Gen2)
    - SerDes-2 Lane E-F: to C293 secure co-processor (PCIe2 x2)
    - SerDes-2 Lane G-H: to SATA1 & SATA2
    IFC/Local Bus:
    - NOR: 128MB 16-bit NOR flash
    - NAND: 512MB 8-bit NAND flash
    - CPLD: for system controlling with programable header on-board
    eSPI:
    - 64MB N25Q512 SPI flash
    USB:
    - Two USB2.0 ports with internal PHY (both Type-A)
    PCIe:
    - One PCIe x4 gold-finger
    - One PCIe x4 connector
    - One PCIe x2 end-point device (C293 Crypto co-processor)
    SATA:
    - Two SATA 2.0 ports on-board
    SDHC:
    - support a TF-card on-board
    I2C:
    - Four I2C controllers.
    UART:
    - Dual 4-pins UART serial ports

    Signed-off-by: Shengzhou Liu
    Reviewed-by: York Sun

    Shengzhou Liu
     
  • Change QIXIS timing parameter CONFIG_SYS_CS3_FTIM2 to 8 from 0.
    Fix EMI2 for t2080qds, which was caused by adding t2081qds.

    Signed-off-by: Shengzhou Liu
    Reviewed-by: York Sun

    Shengzhou Liu
     
  • USB spec says that the minimum disconnect threshold should be
    over 525 mV. However, internal USB PHY threshold value is below
    this specified value. Due to this some devices disconnect at
    run-time. Hence, phy settings are tweaked to increased disconnect
    threshold to be above 525mV by using this workaround.

    Signed-off-by: Suresh Gupta
    Reviewed-by: York Sun

    Suresh Gupta
     

05 Mar, 2014

15 commits

  • Tom Rini
     
  • omap_elm.h is a generic header used by OMAP ELM driver for all TI platfoms.
    Hence this file should be present in generic folder instead of architecture
    specific include folder.
    Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5

    Signed-off-by: Pekon Gupta

    pekon gupta
     
  • omap_gpmc.h is a generic header used by OMAP NAND driver for all TI platfoms.
    Hence this file should be present in generic folder instead of architecture
    specific include folder.
    Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5

    Signed-off-by: Pekon Gupta

    pekon gupta
     
  • OMAP NAND driver can detect Page-size and OOB-size of NAND device from ONFI
    params or nand_id[] table. And based on that it defines ECC layout.
    This patch
    1) removes following board configs used for defining NAND ECC layout
    - GPMC_NAND_ECC_LP_x16_LAYOUT (for large page x16 NAND)
    - GPMC_NAND_ECC_LP_x8_LAYOUT (for large page x8 NAND)
    - GPMC_NAND_ECC_SP_x16_LAYOUT (for small page x16 NAND)
    - GPMC_NAND_ECC_SP_x8_LAYOUT (for small page x8 NAND)

    2) removes unused #defines in common omap_gpmc.h depending on above configs

    Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5

    Signed-off-by: Pekon Gupta

    pekon gupta
     
  • Add 64-bit data for memory commands, such as md, mw, mm, cmp. The new
    size ".q " is introduced.

    For 64-bit architecture, 64-bit data is enabled by default, by detecting
    compiler __LP64__. It is optional for other architectures.

    Signed-off-by: York Sun

    York Sun
     
  • Convert sandbox over to use driver model GPIOs.

    Signed-off-by: Simon Glass

    Simon Glass
     
  • Add driver model support for GPIOs. Since existing GPIO drivers do not use
    driver model, this feature must be enabled by CONFIG_DM_GPIO. After all
    GPO drivers are converted over we can perhaps remove this config.

    Tests are provided for the sandbox implementation, and are a sufficient
    sanity check for basic operation.

    The GPIO uclass understands the concept of named banks of GPIOs, with each
    GPIO device providing a single bank. Within each bank the GPIOs are numbered
    using an offset from 0 to n-1. For example a bank named 'b' with 20
    offsets will provide GPIOs named b0 to b19.

    Anonymous GPIO banks are also supported, and are just numbered without any
    prefix.

    Each time a GPIO driver is added to the uclass, the GPIOs are renumbered
    accordinging, so there is always a global GPIO numbering order.

    Signed-off-by: Simon Glass
    Signed-off-by: Marek Vasut
    Signed-off-by: Pavel Herrmann
    Signed-off-by: Viktor Křivák
    Signed-off-by: Tomas Hlavacek

    Simon Glass
     
  • As an example of how to write a uclass and a driver, provide a demo version
    of each, accessible through the 'demo' command.

    To use these with driver model, define CONFIG_CMD_DEMO and CONFIG_DM_DEMO.

    The two demo drivers are enabled with CONFIG_DM_DEMO_SIMPLE and
    CONFIG_DM_DEMO_SHAPE.

    Signed-off-by: Simon Glass
    Signed-off-by: Marek Vasut
    Signed-off-by: Pavel Herrmann
    Signed-off-by: Viktor Křivák
    Signed-off-by: Tomas Hlavacek

    Simon Glass
     
  • This command is not required for driver model operation, but can be useful
    for testing. It provides simple dumps of internal data structures.

    Signed-off-by: Simon Glass
    Signed-off-by: Marek Vasut
    Signed-off-by: Pavel Herrmann
    Signed-off-by: Viktor Křivák
    Signed-off-by: Tomas Hlavacek

    Simon Glass
     
  • Add some tests of driver model functionality. Coverage includes:

    - basic init
    - binding of drivers to devices using platform_data
    - automatic probing of devices when referenced
    - availability of platform data to devices
    - lifecycle from bind to probe to remove to unbind
    - renumbering within a uclass when devices are probed/removed
    - calling driver-defined operations
    - deactivation of drivers when removed
    - memory leak across creation and destruction of drivers/uclasses
    - uclass init/destroy methods
    - automatic probe/remove of children/parents when needed

    This function is enabled for sandbox, using CONFIG_DM_TEST.

    Signed-off-by: Simon Glass

    Simon Glass
     
  • Use driver model in sandbox to permit running of driver model unit test.

    Signed-off-by: Simon Glass

    Simon Glass
     
  • Add driver model functionality for generic board.

    This includes data structures and base code for registering devices and
    uclasses (groups of devices with the same purpose, e.g. all I2C ports will
    be in the same uclass).

    The feature is enabled with CONFIG_DM.

    Signed-off-by: Simon Glass
    Signed-off-by: Marek Vasut
    Signed-off-by: Pavel Herrmann
    Signed-off-by: Viktor Křivák
    Signed-off-by: Tomas Hlavacek

    Simon Glass
     
  • U-Boot now uses errors defined in include/errno.h which are negative
    integers. Commands which fail need to report the error and return 1
    to indicate failure. Add this functionality in cmd_process_error().

    For now this merely reports the error number. It would be possible
    also to produce a helpful error message by storing the error strings
    in U-Boot.

    Signed-off-by: Simon Glass

    Simon Glass
     
  • Add support for building a device tree for sandbox's CONFIG_OF_HOSTFILE
    option to make it easier to use device tree with sandbox.

    This adjusts the Makefile to build a u-boot.dtb file which can be passed
    to sandbox U-Boot with:

    ./u-boot -d u-boot.dtb

    Signed-off-by: Simon Glass

    Simon Glass
     
  • Copied from Linux sources "include/linux/sizes.h" commit
    413541dd66d51f791a0b169d9b9014e4f56be13c

    Signed-off-by: Alexey Brodkin

    Cc: Vineet Gupta
    Cc: Tom Rini
    Cc: Stefan Roese
    Cc: Albert Aribaud
    Acked-by: Tom Rini
    Acked-by: Stefan Roese
    [trini: Add bcm Kona platforms to the patch]
    Signed-off-by: Tom Rini

    Alexey Brodkin
     

04 Mar, 2014

3 commits


27 Feb, 2014

2 commits


26 Feb, 2014

2 commits

  • With this, fixup a trivial build error of get_effective_memsize needing
    to be updated in the new board/freescale/p1010rdb/spl.c

    Signed-off-by: Tom Rini

    Tom Rini
     
  • Same as the previous commit.
    Move sanity check to prepare1 target to avoid nasty troubles.

    Before this commit, LDSCRIPT existence was not checked
    when it was specified by CONFIG_SYS_LDSCRIPT.
    Now LDSCRIPT existence is checked for all boards.

    $(wildcard $(LDSCRIPT)) must point to the linker scripts
    with absolute path.
    Otherwise, make will terminate with a false error
    on out-of-tree build.

    Signed-off-by: Masahiro Yamada

    Masahiro Yamada
     

25 Feb, 2014

6 commits

  • u-boot binary size for Freescale mpc8536DS platforms is 512KB.
    This has been reached to upper limit of the platforms and causig
    linker error. So increase the u-boot binary size to 768KB.

    Signed-off-by: Haijun Zhang
    Reviewed-by: York Sun

    Haijun.Zhang
     
  • In the previous patches, we introduced the SPL/TPL fraamework.
    For SD/SPI flash booting way, we introduce the SPL to enable a loader stub. The
    SPL was loaded by the code from the internal on-chip ROM. The SPL initializes
    the DDR according to the SPD and loads the final uboot image into DDR, then
    jump to the DDR to begin execution.

    For NAND booting way, the nand SPL has size limitation on some board(e.g.
    P1010RDB), it can not be more than 8KB, we can call it "minimal SPL", So the
    dynamic DDR driver doesn't fit into this minimum SPL. We added the TPL that is
    loaded by the the minimal SPL. The TPL initializes the DDR according to the SPD
    and loads the final uboot image into DDR,then jump to the DDR to begin execution.

    This patch enabled SPL/TPL for P1010RDB to support starting from NAND/SD/SPI
    flash with SPL framework and initializing the DDR according to SPD in the SPL/TPL.
    Because the minimal SPL load the TPL to L2 SRAM and the jump to the L2 SRAM to
    execute, so the section .resetvec is no longer needed.

    Signed-off-by: Ying Zhang
    Reviewed-by: York Sun

    Ying Zhang
     
  • There was no enough memory for malloc in SPL booting from spi flash, so
    relayout the memory in SPL: reduce the memory for global data from 16K
    Bytes to 4K Bytes, save the space for malloc.

    Signed-off-by: Ying Zhang
    Reviewed-by: York Sun

    Ying Zhang
     
  • There was no enough stack in SPL, so the buffer needed in SPL is to malloc
    from memory pool and to repalce the temporary variable.

    Signed-off-by: Ying Zhang
    Reviewed-by: York Sun

    Ying Zhang
     
  • 1. The SPL's length of SDCARD boot has not enough,expand the SPL's
    length to 128K.
    2. deleted unused symbol: CONFIG_SYS_RUN_INDDR

    Signed-off-by: Ying Zhang
    Reviewed-by: York Sun

    Ying Zhang
     
  • T2081 QDS is a high-performance computing evaluation, development and
    test platform supporting the T2081 QorIQ Power Architecture processor.

    T2081QDS board Overview
    -----------------------
    - T2081 SoC integrating four 64-bit dual-threads e6500 cores up to 1.8GHz
    - 2MB shared L2 and 512KB L3 CoreNet platform cache (CPC)
    - CoreNet fabric supporting coherent and noncoherent transactions with
    prioritization and bandwidth allocation
    - 32-/64-bit DDR3/DDR3LP SDRAM memory controller with ECC and interleaving
    - Ethernet interfaces:
    - Two on-board 10M/100M/1G bps RGMII ports
    - Two 10Gbps XFI with on-board SFP+ cage
    - 1Gbps/2.5Gbps SGMII Riser card
    - 10Gbps XAUI Riser card
    - Accelerator:
    - DPAA components consist of FMan, BMan, QMan, PME, DCE and SEC
    - SerDes:
    - 8 lanes up to 10.3125GHz
    - Supports SGMII, HiGig, XFI, XAUI and Aurora debug,
    - IFC:
    - 512MB NOR Flash, 2GB NAND Flash, PromJet debug port and Qixis FPGA
    - eSPI:
    - Three SPI flash (16MB N25Q128A + 16MB EN25S64 + 512KB SST25WF040)
    - USB:
    - Two USB2.0 ports with internal PHY (one Type-A + one micro Type mini-AB)
    - PCIe:
    - Four PCI Express controllers (two PCIe 2.0 and two PCIe 3.0 with SR-IOV)
    - eSDHC:
    - Supports various SD/SDHC/SDXC/eMMC devices with adapter cards and
    voltage translators
    - I2C:
    - Four I2C controllers.
    - UART:
    - Dual 4-pins UART serial ports

    Signed-off-by: Shengzhou Liu
    Reviewed-by: York Sun

    Shengzhou Liu
     

24 Feb, 2014

2 commits


23 Feb, 2014

2 commits


22 Feb, 2014

5 commits

  • Rework rpi_b's bootcmd (and sub-commands) to match Tegra's bootcmd as
    much as possible. This will aid in a future patch which will create a
    common header e.g. config_distro_bootcmd.h.

    While at it, enable booting from extlinux.conf using the sysboot command.

    The iteration and componentization currently makes a little more sense
    for Tegra than RPi, but I'd still like to keep the two as similar as
    possible. USB and networking support is coming to the RPi in due course,
    and it'll all make more sense then anyway.

    Signed-off-by: Stephen Warren

    Stephen Warren
     
  • Commit 6789e84ecaa8f45d053084e08c381284a04abff7 (i2c, omap24xx:
    convert driver to new mutlibus/mutliadapter framework) intended to
    make I2C driver compatible with latest changes. It unfortunately has
    had a impact on size on SPL as well. For example on SDP4430,
    32032 bytes before/MLO
    35416 bytes after/MLO

    With this mentioned commit, MLO stops booting on SDP4430 as only 32K
    is accessible for non-secure (bootloader) s/w on GP devices and the size
    increase to 56K fails boot.

    On the latest u-boot commit e7be18225fbea76d1f0034b224f0d1e60f07cfcf,
    MLO is now at size 35592 bytes, However, I2C is not necessary for SPL
    to function as we use SR_I2C for controlling the PMIC.
    Disabling I2C reduces MLO to 32224 bytes which allows
    OMAP4 GP platform to boot up.

    Since this is common for all OMAP4 platforms, remove the need for I2C
    for SPL builds in the common config.

    Signed-off-by: Nishanth Menon
    Reviewed-by: Sricharan R

    Nishanth Menon
     
  • Signed-off-by: Tom Rini

    Tom Rini
     
  • Signed-off-by: Tom Rini

    Tom Rini
     
  • Signed-off-by: Tom Rini

    Tom Rini