05 Feb, 2021
1 commit
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i.MX8MQ B2 is using same value in OCOTP_READ_FUSE_DATA like B1, so
we have to check the ROM verision to distinguish the revision.As we have checked the B1 rev for sticky bits work around in
secure boot. So it won't apply on B2.Signed-off-by: Ye Li
Reviewed-by: Peng Fan
(cherry picked from commit 1ac96bde4920fa3e2a3bb4a79b342ca4f5adb4a5)
27 Jan, 2021
2 commits
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* origin/ls_v2020.04:
net: memac_phy: add a timeout to MDIO operations
armv8: lx2: SVR_SOC_VER: Mask CAN_FD and security bit -
Multiple LX2(LX2160A/LX2162A SoC) personality variants
exists based on CAN-FD and security bit in SVR.Currenly SVR_SOC_VER mask only security bit.
Update SVR_SOC_VER to mask CAN_FD and security bit
for LX2 products.Signed-off-by: Wasim Khan
13 Jan, 2021
2 commits
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* origin/ls_v2020.04:
armv8: ls1028a: fix stream id allocation
configs: ls1088aqds: add COMMON_ENV to fix distroboot
board: fsl: ls2088ardb: Program GIC LPI configuration table -
When A-050382 errata is enabled, ECAM and EDMA have
conflicting stream id 40. This patch fixes the same.Signed-off-by: Nipun Gupta
16 Nov, 2020
1 commit
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There are 3 part numbers for 11x11 i.MX8MNano with different core number
configuration: UltraLite Quad/Dual/SoloComparing with i.MX8MN Lite parts, they have MIPI DSI disabled. So
checking the MIPI DSI disable fuse to recognize these parts.Signed-off-by: Ye Li
Reviewed-by: Peng Fan
(cherry picked from commit 05af9ac08052c92d011908726534e227db3143c4)
09 Nov, 2020
1 commit
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The value of Unique ID in uboot and kernel is different for iMX8MP:
serial#=02e1444a0002aaff
root@imx8mpevk:/sys/devices/soc0# cat soc_uid
D699300002E1444AThe reason is that Fuse Addresses of Unique ID of iMX8MP are 0x420 and
0x430.Reviewed-by: Ye Li
Signed-off-by: Alice Guo
(cherry picked from commit 38bcdd0bf78951480cb67e1b9d58b37c364195fc)
06 Nov, 2020
1 commit
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Support iMX8DXL in mxsfb driver by below changes:
1. Enable iMX8 in lcdif registers file
2. Add u-boot clock driver support for iMX8
3. Change the FB buffer alignment to align it at allocation. So
it won't overlay with other memory at mmu_set_region_dcache_behaviourSigned-off-by: Ye Li
Reviewed-by: Peng Fan
(cherry picked from commit 6f02d6894509e0aa79df9d1bdf5029136e1493b5)
30 Oct, 2020
1 commit
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Signed-off-by: Ye Li
29 Oct, 2020
1 commit
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Fix a bug as belows,
=> gpio status -a
"Synchronous Abort" handler, esr 0x96000061
elr: 0000000082047964 lr : 0000000082047960 (reloc)
elr: 00000000fbd72964 lr : 00000000fbd72960
x0 : 00000000ffffffff x1 : 000000000000000a
x2 : 0000000000000020 x3 : 0000000000000001
x4 : 0000000000000000 x5 : 0000000000000030
x6 : 0000000000000020 x7 : 0000000000000002
x8 : 00000000ffffffe0 x9 : 0000000000000008
x10: 0000000000000010 x11: 0000000000000006
x12: 000000000001869f x13: 0000000000000230
x14: 00000000fbc23e9c x15: 00000000ffffffff
...
resetingSigned-off-by: Biwen Li
19 Oct, 2020
2 commits
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Conflicts:
arch/arm/cpu/armv8/Kconfig
drivers/pci/pcie_layerscape_fixup.c
drivers/video/imx/Makefile
drivers/video/nxp/Kconfig
drivers/video/nxp/Makefile
drivers/video/nxp/hdp/Makefile
drivers/video/nxp/hdp/test_base_sw.cSigned-off-by: Ye Li
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Enable LPSPI2-3 clock enable and get functions.
Please note that the lpspi's alias should only be set as same as its
module number.Signed-off-by: Clark Wang
Reviewed-by: Ye Li
(cherry picked from commit 132ea95f15f3dcf3408d70eb7879533b412cd521)
09 Oct, 2020
1 commit
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As per hardware documentation, ECx_PMUX has precedence
over SerDes protocol.
For LX2160/LX2162 if DPMACs 17 and 18 are enabled as SGMII
through SerDes protocol but ECx_PMUX configured them as RGMII,
then the ports will be configured as RGMII and not SGMII.Signed-off-by: Razvan Ionut Cirjan
29 Sep, 2020
1 commit
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Enable the gpio feature on fsl-layerscape platform.
Signed-off-by: hui.song
18 Sep, 2020
2 commits
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This patch moves the SVR definitiones to a new svr.h for
Layerscape armv7 and armv8 platforms respectively, so that
the PCIe driver can reuse them.Signed-off-by: Hou Zhiqiang
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add one struct mpc8xxx_gpio_plat to enable gpio feature.
Signed-off-by: hui.song
15 Sep, 2020
1 commit
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Fix coverity issue:
"15 | ((dfs_on & 15) << 0) is always 0xf regardless of the
values of its operands."Issue: LF-1941
Signed-off-by: Larisa Grigore
08 Sep, 2020
1 commit
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LX2162 is LX2160 based SoC, it has same die as of LX2160
with different packaging.LX2162A support 64-bit 2.9GT/s DDR4 memory, i2c, micro-click module,
microSD card, eMMC support, serial console, qspi nor flash, qsgmii,
sgmii, 25g, 40g, 50g network interface, one usb 3.0 and serdes
interface to support three PCIe gen3 interface.Signed-off-by: Meenakshi Aggarwal
28 Aug, 2020
2 commits
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Prepare for 3rd merge window of lf_uboot
Signed-off-by: Ye Li
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Prepare for 3rd merge window of lf_uboot
Signed-off-by: Ye Li
27 Aug, 2020
1 commit
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This patch is to define esdhc_status_fixup function for ls1028a to disable
SDHC1/SDHC2 status in device tree node if not selected.Signed-off-by: Yinbo Zhu
Signed-off-by: Xiaowei Bao
Signed-off-by: Yangbo Lu
Reviewed-by: Priyanka Jain
26 Aug, 2020
7 commits
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i.MX 6 and i.MX 7 do not have the same offset from IOMUXC_BASE_ADDR
for the IOMUX GRP.
Try to align both structure.Signed-off-by: Silvano di Ninno
(cherry picked from commit 3d80f811dad882d8fe950dabee934bd3a1bf86b5) -
8DXL A1 revision uses same id register value with revision B,
so A1 chip is recognized as RevB. Add new dummy chip revision for
8DXL A1 and A2 to distinguish with of RevB and RevCSigned-off-by: Ye Li
Reviewed-by: Peng Fan
(cherry picked from commit 687f605630e0b87e963419aa59dec06d0f7b9cb1) -
Fix SSCG_PLL_REFCLK_SEL_x, the offset starts from 0, not 16
Reported-by: Coverity 3448860
Signed-off-by: Peng Fan
Reviewed-by: Ye Li
(cherry picked from commit 2c129d821f4b20a04e1aa3d83b259a175e98d1d3) -
Coverity reported dead code, however it is FRAC_PLL_REFCLK_SEL_MASK
was wrongly set.Reported-by: Coverity 10045172
Signed-off-by: Peng Fan
Reviewed-by: Ye Li
(cherry picked from commit 5a9454988ea953196f412dd9c5835fe36fe677b6) -
According to i.MX 7Dual Applications Processor Reference Manual, Rev. 1
The target interface CCM root index ranges [0,124], so the number
should be 125.Reported-by: Coverity 18045
Signed-off-by: Peng Fan
Reviewed-by: Ye Li
(cherry picked from commit 579fb77466fa8baf5c7422b3168449d3bc0c9d30) -
Latest datasheet revE has removed MIMX8ML7D/5D/7C/5C parts, so
update u-boot to remove decoding and support for those parts.Signed-off-by: Ye Li
Reviewed-by: Peng Fan
(cherry picked from commit ae3d51bd650bf4ef8e731c935c8f02c19d8f1df1) -
Update SCFW API to add sc_seco_v2x_build_info API which can
get the version and commit of V2X firmware on 8DXLSigned-off-by: Ye Li
Reviewed-by: Peng Fan
(cherry picked from commit 655e05e6751ebbd94dd9ab1b77ed1020a661a115)
25 Aug, 2020
12 commits
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- init SRAM from address (with boundaries control)
- load elf from SD to SRAM address
- start M4 from SRAM address
- fixesSigned-off-by: Vicovan Ionut-Valentin-VCVV001
In initSRAM command add check for alignment on start address and size
and return usage if not aligned.
Create initsram.cIssue: ALB-2118, ALB-81
Signed-off-by: Matthew Nunez
Signed-off-by: Larisa Grigore -
Add a method to check if an address in in sram.
Signed-off-by: Ana Nedelcu
Signed-off-by: Irina Presa -
Add add assembly macros to separate platform-dependent code sections.
Place macros into header files that
are referenced in each platform's respective regs header file. Invoke
macros in place of platform dependent code sections.
Change code to align with the reference manual recommendation of
setting the DMA channel start bit last during channel configuration.Add #ifdef __INCLUDE_ASSEMBLY_MACROS__ to dma_macros.h to protect assembly
language macros from inclusion enc_embedded and envcrc tools that include
the soc registers header files and define __ASSEMBLY__ to get all macros
from header file.Issue: ALB-2436, ALB-2602
Signed-off-by: Matthew Nunez -
This adds initial support and configuration for
the MicroSys SBC-S32 evaluation board.Signed-off-by: Kay Potthoff
- moved SYS_VENDOR config to board/freescale/Kconfig in order to avoid code
duplication.
- removed unrelevant configs from board/microsys/mpxs32v234/Kconfig
- documented magic numbers from /board/microsys/mpxs32v234/mpxs32v234.c
- documented magic numbers from /board/microsys/mpxs32v234/mpxs32v234.cfg
- removed BCM switch configSigned-off-by: Costin Carabas
Signed-off-by: Cosmin Oprea -
Pinctrl settings for I2C-bus support for I2C0 and
I2C1.Signed-off-by: Kay Potthoff
Signed-off-by: Costin Carabas -
Intruduce initial support for s32v234 mini bluebox board.
Issue: ALB-1081
Signed-off-by: Stoica Cosmin-Stefan
Signed-off-by: Larisa Grigore -
PCIe clock source is now configurable and defaults to internal.
Every board except CUT 2.0 will use the internal one. To use
external clock, set hwconfig u-boot env variable.Signed-off-by: Heinz Wrobel
Signed-off-by: Irina Presa
Signed-off-by: Vicovan Ionut-Valentin-VCVV001
Signed-off-by: Costin Carabas -
Enable EP ignoring ERR009852
Signed-off-by: Heinz Wrobel
Signed-off-by: Aurelian Floricica
Signed-off-by: Costin Carabas
Signed-off-by: Stefan-Gabriel Mirea
Signed-off-by: Larisa Grigore -
Support added for RC mode of the PCIe controller
Signed-off-by: Aurelian Floricica
Signed-off-by: Larisa Grigore -
Enable RGMII mode for ENET in SRC register.
Signed-off-by: Stoica Cosmin-Stefan
Signed-off-by: Heinz Wrobel
Signed-off-by: Irina Presa -
Implemented pinmuxing for ENET driver.
Signed-off-by: Stoica Cosmin-Stefan
Signed-off-by: Mihaela Martinas
Signed-off-by: Costin Carabas -
Move function definitions at the edn of the file.
Signed-off-by: Larisa Grigore
