19 Oct, 2017
2 commits
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Up to now we depended on an exported variable to build u-boot.rom.
We should be able to specify it in the configuration file, too.With this patch this becomes possible using the new Kconfig option
CONFIG_BUILD_ROM.This option depends on CONFIG_X86 and is selected in
qemu-x86_defconfig and qemu-x86_64_defconfig.Cc: Simon Glass
Cc: Bin Meng
Signed-off-by: Heinrich Schuchardt
Reviewed-by: Bin Meng -
Adjust VGA rom address to 0xfffb0000 so that u-boot.rom image
can be built again.Signed-off-by: Bin Meng
Reviewed-by: Stefan Roese
16 Sep, 2017
1 commit
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This adds support to Intel Cherry Hill board, a board based on
Intel Braswell SoC. The following devices are validated:- serial port as the serial console
- on-board Realtek 8169 ethernet controller
- SATA AHCI controller
- EMMC/SDHC controller
- USB 3.0 xHCI controller
- PCIe x1 slot with a graphics card
- ICH SPI controller with an 8MB Macronix SPI flash
- Integrated graphics device as the video consoleSigned-off-by: Bin Meng
Reviewed-by: Simon Glass
15 Aug, 2017
1 commit
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Also introduce CONFIG_USE_BOOTARGS option so we can control if
CONFIG_BOOTARGS defined at all.Signed-off-by: Sam Protsenko
[trini: Resync r8a779[56]_ulcb, various ls10xx targets]
Signed-off-by: Tom Rini
30 Jul, 2017
1 commit
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Add Intel Edison board which is using U-Boot.
The patch is based on work done by the following people (in alphabetical
order):
Aiden Park
Dukjoon Jeon
eric.park
Fabien Chereau
Felipe Balbi
Scott D Phillips
Sebastien Colleur
Steve Sakoman
Vincent TinelliIn case we're building for Intel Edison, we must have 4096 bytes of
zeroes in the beginning on u-boot.bin. This is done in
board/intel/edison/config.mk.First run sets hardware_id environment variable which is read from
System Controller Unit (SCU).Serial number (serial# environment variable) is generated based on eMMC
CID.MAC address on USB network interface is unique to the board but kept the
same all over the time.Set mac address from U-Boot using following scheme:
OUI = 02:00:86
next 3 bytes of MAC address set from eMMC serial numberThis allows to have a unique mac address across reboot and flashing.
Signed-off-by: Vincent Tinelli
Signed-off-by: Felipe Balbi
Signed-off-by: Andy Shevchenko
Reviewed-by: Bin Meng
Reviewed-by: Simon Glass
[bmeng: Add MAINTAINERS file for Intel Edison board]
Signed-off-by: Bin Meng
17 May, 2017
1 commit
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Now that we have ACPI S3 support on Intel MinnowMax board, document
some generic information of S3 and how to test it.Signed-off-by: Bin Meng
Reviewed-by: Simon Glass
Tested-by: Stefan Roese
15 Nov, 2016
1 commit
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Enable this so that EFI applications (notably grub) can be run under U-Boot
on x86 platforms.At present the 'hello world' EFI application is not supported for the
qemu-x86_efi_payload64 board. That board builds a payload consisting of a
64-bit header and a 32-bit U-Boot, which is incompatible with the way the
EFI loader builds its EFI application. The following error is obtained:x86_64-linux-ld.bfd: i386 architecture of input file
`lib/efi_loader/helloworld.o' is incompatible with i386:x86-64 outputThis could be corrected with additional Makefile rules. For now, this
feature is disabled for that board.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
[agraf: drop hello kconfig bits]
Signed-off-by: Alexander Graf
12 Oct, 2016
3 commits
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This converts coreboot to use DM framebuffer driver.
Signed-off-by: Bin Meng
Reviewed-by: Simon Glass -
The kernel load address for zboot should be 0x1000000.
Signed-off-by: Bin Meng
Reviewed-by: Simon Glass -
For some unknown reason, coreboot framebuffer driver never works on
QEMU since day 1. It seems the driver only works on real hardware.
Document this issue.Signed-off-by: Bin Meng
Reviewed-by: Simon Glass
16 Aug, 2016
3 commits
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This feature is not supported. Document this, and add some details on how it
might be implemented.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
UEFI is commonly used on x86. Add a reference to U-Boot's support for this
in the x86 README.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
The debug FSP image is bigger in size than the normal FSP image. This
patch adds a small description on how to use this FSP debug version
by changing CONFIG_FSP_ADDR.Signed-off-by: Stefan Roese
Cc: Bin Meng
Cc: Simon Glass
Reviewed-by: Bin Meng
12 Jul, 2016
1 commit
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Now that platform-specific ACPI global NVS is added, pack it into
ACPI table and get its address fixed up.Signed-off-by: Bin Meng
Reviewed-by: George McCollister
Tested-by: George McCollister
Reviewed-by: Simon Glass
30 May, 2016
1 commit
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Enable ACPI table generation by creating a DSDT table.
Signed-off-by: Bin Meng
Reviewed-by: Simon Glass
23 May, 2016
6 commits
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Windows might cache system information and only detect ACPI changes
if you modify the ACPI table versions.Signed-off-by: Bin Meng
Reviewed-by: Simon Glass -
As of now, U-Boot can support installing and booting Ubuntu/Windows
with the help of SeaBIOS. Update the documentation.Signed-off-by: Bin Meng
Reviewed-by: Simon Glass -
Document how to make SeaBIOS load and run the VGA ROM of Intel
IGD device when loaded by U-Boot.Signed-off-by: Bin Meng
Reviewed-by: Simon Glass -
Currently U-Boot environment address is at offset 0x7fe00 of a 8MB
SPI flash. When creating a partial u-boot.rom image without flash
descriptor and ME firmware, U-Boot actually occupies the last 1MB
of the flash, and reprograming U-Boot causes previous environment
settings get lost which is not convenient during testing.Adjust the environment address to 0x6ef000 instead (before the MRC
cache data region in the flash).Signed-off-by: Bin Meng
Reviewed-by: Stefan Roese
Reviewed-by: Simon Glass -
Remove ACPI from the TODO list and add a new section to document
current ACPI support in U-Boot.Signed-off-by: Bin Meng
Reviewed-by: Simon Glass -
This updates the doc for the following places:
- Mention CRB for Bayley Bay
- Mention Congatec QEVAL 2.0 & conga-QA3/E3845
- Limit part of the QEMU paragraphs to 80 cols
- Correct some typos (drive, it's, Ubuntu)
- Add description for "console=ttyS0,115200"
- Remove CONFIG_BOOTDELAY description which is already
in x86-common.hSigned-off-by: Bin Meng
Reviewed-by: Stefan Roese
Tested-by: Stefan Roese
Reviewed-by: Simon Glass
17 Mar, 2016
4 commits
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This adds basic support for chromebook_samus. This is the 2015 Pixel and
is based on an Intel broadwell platform.Supported so far are:
- Serial
- SPI flash
- SDRAM init (with MRC cache)
- SATA
- Video (on the internal LCD panel)
- KeyboardVarious less-visible drivers are provided to make the above work (e.g. PCH,
power control and LPC).The platform requires various binary blobs which are documented in the
README. The major missing feature is USB3 since the existing U-Boot support
does not work correctly with Intel XHCI controllers.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
Update a few points which have become out-of-date.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
It is useful to automate the process of converting code from coreboot a
little. Add a sed script which performs some common transformations.Signed-off-by: Simon Glass
Acked-by: Bin Meng -
Boting SeaBIOS is done via U-Boot's bootelf command. Document this.
Signed-off-by: Bin Meng
Reviewed-by: Simon Glass
21 Feb, 2016
2 commits
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Update existing documentation to mention Intel Bayley Bay board
instructions, an additional Bay Trail based board to MinnowMax.This also adds a minor change to QEMU section to indicate clearly
the instructions are for bare mode.Signed-off-by: Bin Meng
Reviewed-by: Simon Glass -
This adds basic support to Intel Cougar Canyon 2 board, a board
based on Chief River platform with an Ivy Bridge processor and
a Panther Point chipset.Signed-off-by: Bin Meng
Acked-by: Simon Glass
28 Jan, 2016
1 commit
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This patch adds a parameter to the function setup_early_uart() to either
enable or disable the internal BayTrail legacy UART. Since the name
setup_early_uart() does not match its functionality any more, lets
rename it to setup_internal_uart() as well in this patch.Signed-off-by: Stefan Roese
Reviewed-by: Bin Meng
Reviewed-by: Simon Glass
13 Jan, 2016
1 commit
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Document the usage of 'qfw' command
Signed-off-by: Miao Yan
Reviewed-by: Simon Glass
Reviewed-by: Bin Meng
21 Oct, 2015
4 commits
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Now that we have added MRC cache for Intel FSP and BayTrail codes,
enable it for all BayTrail boards (Bayley Bay and Minnow Max).Note it turns out that FSP for Intel Atom E6xx does not produce
the HOB for NV storage, so we don't have such functionality on
Intel Crown Bay board.Signed-off-by: Bin Meng
Acked-by: Simon Glass -
Introduce a new fsp command and make the existing hob command a
sub-command to fsp for future extension. Also move cmd_hob.c to
the dedicated fsp sub-directory in arch/x86/lib.Signed-off-by: Bin Meng
Acked-by: Simon Glass -
System Management BIOS (SMBIOS) is a specification for how
motherboard and system vendors present management information
about their products in a standard format by extending the BIOS
interface on Intel architecture systems. As of today the latest
spec is 3.0 and can be downloaded from DMTF website. This commit
adds a simple and minimum required implementation.Signed-off-by: Bin Meng
Acked-by: Simon Glass -
Current document about how to boot VxWorks is limited.
Add several chapters in README.vxworks to document this.Signed-off-by: Bin Meng
Reviewed-by: Tom Rini
17 Sep, 2015
2 commits
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Desktop Management Interface (DMI) is not supported by U-Boot now.
Add it to the TODO list.Signed-off-by: Bin Meng
Acked-by: Simon Glass -
Document porting considerations for Intel Quark based board,
including MRC parameters and PCIe initialization.Signed-off-by: Bin Meng
Acked-by: Simon Glass
09 Sep, 2015
1 commit
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CONFIG_X86_OPTION_ROM_ADDR has been renamed to CONFIG_VGA_BIOS_ADDR.
Update the doc to refer to the new name.Signed-off-by: Bin Meng
Acked-by: Simon Glass
Tested-by: Simon Glass
26 Aug, 2015
2 commits
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This is incorrect since we require the -m parameter to the microcode tool.
Update the two examples to show this.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
With recent EFI support, the entry point address of coreboot payload
was changed. Now we update the address to use _x86boot_start, which
is the same one for EFI.Signed-off-by: Bin Meng
15 Aug, 2015
1 commit
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It is a bit tedious to figure out the interrupt configuration for a new
x86 platform. Add a script which can do this, based on the output of
'pci long'. This may be helpful in some cases.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Tested-by: Bin Meng
14 Aug, 2015
1 commit
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* Explicitly list the targets supported in each section of the
instructions from the x86 README.* Drop references to 'raw mode', in favor of 'bare mode'.
Signed-off-by: Igor Stoppa
Reviewed-by: Bin Meng
