02 Apr, 2018

1 commit


24 Jan, 2018

1 commit


11 Jan, 2018

1 commit


09 Aug, 2017

1 commit

  • Fix the size calculation in the verify boot. The original
    patch 266b5c0cdbd1150cf5e6bde0d473e5d2f0f60812 was merged
    but this was not the correct version. The correct version
    subtracted the header.

    Fixes: 266b5c0cdbd1 ("arm: am33xx: security: adds auth support for encrypted images")
    Signed-off-by: Madan Srinivas
    Signed-off-by: Dan Murphy

    Madan Srinivas
     

26 Jul, 2017

1 commit


25 Jul, 2017

1 commit

  • This patch adds support for authentication of both plain
    text and encrypted binaries. A new SECDEV package is needed
    to enable encryption of binaries by default for AM3x.

    The ROM authentication API detects encrypted images at
    runtime and automatically decrypts the image if the
    signature verification passes.

    Addition of encryption on AM3x results in a change in the
    image format. On AM4x, AM5x and, on AM3x devices signing
    clear test images, the signature is appended to the end of the
    binary.

    On AM3x, when the SECDEV package is used to create signed
    and encrypted images, the signature is added as a header
    to the start of the binary. So the binary size calculation
    has been updated to reflect this change.

    The signing tools and encrypted image format for AM3x
    cannot be changed to behave like AM4x and AM5x to
    maintain backward compatibility with older Sitara
    M-Shield releases.

    Adding encryption support also increases the size of
    the PPA. As the SPL is loaded right after the PPA for
    any peripheral boot, this increase in PPA size results
    in the SPL load address moving by 0x200 bytes (for UART boot).
    Memory boot modes like MMC are not affected, as the ROM
    loads the PPA and SPL in two separate steps.

    Acked-by: Andrew F. Davis
    Signed-off-by: Madan Srinivas

    Madan Srinivas
     

24 Jul, 2017

1 commit

  • commit 6183b29559107650cb38f905e069a93ff9da1d7d upstream

    Currently while setting the vsel value for dcdc1 and dcdc2
    the driver is wrongly masking the entire 8 bits in the process
    clearing PFM (bit7) field as well. Hence describe an appropriate
    mask for vsel field and modify only those bits in the vsel
    mask.

    Source: http://www.ti.com/lit/ds/symlink/tps65218.pdf

    Signed-off-by: Keerthy
    Fixes: 86db550b38 ("power: Add support for the TPS65218 PMIC")
    Reviewed-by: Jaehoon Chung

    Keerthy
     

20 Jul, 2017

1 commit


17 Jul, 2017

1 commit

  • Increase PHY autonegoiate time from current 8 seconds
    to 16 seconds. On some Ethernet switches, 2 times out
    of 100, the Micrel KSZ9031 PHY on AM572x IDK board seems
    to take more than 8 seconds to establish link at gigabit
    speeds.

    Since the timeout is only an upper bound on waiting time
    it should not affect users who do not face the same
    problem.

    Signed-off-by: Sekhar Nori

    Sekhar Nori
     

15 Jul, 2017

5 commits


03 Jul, 2017

3 commits


27 Jun, 2017

5 commits

  • gpio2 is used to detect lcd based on which pin mux is done in SPL.
    gpio7 is used to enable vtt regulator. Enable these teo gpio nodes
    in SPL.

    Signed-off-by: Lokesh Vutla

    Lokesh Vutla
     
  • Enable spl_early_init() so that spl can use
    DT very early during boot.

    Signed-off-by: Lokesh Vutla

    Lokesh Vutla
     
  • ROM stores the boot params information in a known location
    and passes it to SPL. This information needs to be copied
    very early during boot or else there is a chance of getting
    corrupted by SPL. So move this boot device detection very early
    during boot.

    Signed-off-by: Lokesh Vutla

    Lokesh Vutla
     
  • Calls to IS_ENABLED() on a non-y/n option will always be false, even
    when set. We can correct this by adding a new bool value that is set
    based on the conditions required for SPL_STACK_R_MALLOC_SIMPLE_LEN to be
    set instead.

    Fixes: 340f418acd11 ("spl: Add spl_early_init()")
    Reported-by: Lokesh Vutla
    Signed-off-by: Tom Rini

    Tom Rini
     
  • At present malloc_base/_limit/_ptr are not initialised in spl_init() when
    we call spl_init() in board_init_f(). This is due to a recent change aimed
    at avoiding overwriting the malloc area set up on some boards by
    spl_relocate_stack_gd().

    However if CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN is not defined, we now
    skip setting up the memory area in spl_init() which is obviously wrong.

    To fix this, add a new function spl_early_init() which can be called in
    board_init_f().

    Fixes: b3d2861e (spl: Remove overwrite of relocated malloc limit)
    Signed-off-by: Eddie Cai
    Rewrote spl_{,early_}init() to avoid duplicate code:
    Rewrite/expand commit message:
    Signed-off-by: Simon Glass
    Reviewed-by: Eddie Cai

    Eddie Cai
     

17 Jun, 2017

1 commit


15 Jun, 2017

2 commits

  • commit 7a53a1a8115b upstream

    The problems with the current DFU layout are:
    MMC: The space allocated for u-boot is too small for the latest u-boot
    (>750KB). We need to increase it. eMMC uses a much bigger area (2MB).
    eMMC: region "u-boot.img.raw" overlaps the environment area and the region
    "spl-os-image.raw".
    both: region "spl-os-image.raw" is quite small and can't handle android
    kernels

    Fixing this requires growing some regions and moving others.
    Care has been taken to leave some room for further growth of
    "spl-os-args.raw".
    Also the "env" now appears in the dfu so that it's apparent that the
    region is not free space that can be used to grow "u-boot.img.raw".
    The MLO region is 0x100 sectors wide but the 0x100 are unused in case the
    MLO comes too overflow this areas.
    The total space allocated for those raw binaries is 16MB, of which 13+MB
    are reserved for the kernel image.

    Signed-off-by: Jean-Jacques Hiblot
    Reviewed-by: Tom Rini
    Reviewed-by: Sam Protsenko

    Jean-Jacques Hiblot
     
  • On secure devices the initial secure software may install a firewall at
    the end of DRAM, define protected RAM to avoid space.

    Signed-off-by: Andrew F. Davis

    Andrew F. Davis
     

10 Jun, 2017

1 commit

  • commit 5cb52e573f ("board: am335x: Introduce scale_vcores")
    updated voltages of each board based on efuse. It updated
    beagle bone specific voltages under the condition board_is_bone().
    But this is true only for BeagleBoneWhite. Due to which voltages
    are not configured for BBB, BBW as wrong device is being probed.

    So create a common function board_is_beaglebonex() which includes
    am335x based beagle family. Use this for updating voltages.

    Also remove extra if condition for selecting voltages which is
    done later using a switch case and match usb current limit as
    before the commit 5cb52e573f.

    Fixes: 5cb52e573f ("board: am335x: Introduce scale_vcores")
    Reported-by: Emmanuel Vadot
    Signed-off-by: Lokesh Vutla

    Lokesh Vutla
     

07 Jun, 2017

2 commits

  • When fat command is enabled, enable fatwrite too
    so U-Boot can create new files too.

    Signed-off-by: Sekhar Nori

    Sekhar Nori
     
  • As per the datasheet[1] available for DDR2 part on board
    the OMAP-L138 LCDK, the tXSNR (exit self refresh to a
    non-read command) is 137.5 ns. This corresponds to a
    value of 20 to be written to T_XSNR register field of
    OMAP-L138's DDR configuration. The DDR2 is at 150 MHz.

    Fix this. The correct value also appears on the initialization
    scripts (called CCS GEL files) available on TI's wiki pages[2]

    [1] http://www.samsung.com/global/business/semiconductor/file/product/ds_k4t1gxx4qf_rev12-0.pdf
    [2] http://processors.wiki.ti.com/index.php/L138/C6748_Development_Kit_(LCDK)#CCS_XML_.26_GEL_Files

    Reviewed-by: Tom Rini
    Signed-off-by: Sekhar Nori

    Sekhar Nori
     

24 May, 2017

6 commits


22 May, 2017

6 commits