16 Apr, 2014
3 commits
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Because of some driver base on DMA, changed the initcall order as subsys_initcall.
Signed-off-by: Yuan Yao
Signed-off-by: Vinod Koul -
The ">" here should be ">=" or we are one step beyond the end of the
sdma->channels[] array.Fixes: 2e041c94628c ('dmaengine: sirf: enable generic dt binding for dma channels')
Signed-off-by: Dan Carpenter
Acked-by: Barry Song
Signed-off-by: Vinod Koul -
VIDEO_TIMBERDALE selects TIMB_DMA which itself depends on
MFD_TIMBERDALE, so VIDEO_TIMBERDALE should either select or depend on
MFD_TIMBERDALE as well. I chose to make it depend on it because I
think it makes more sense and it is consistent with what other options
are doing.Adding a "|| HAS_IOMEM" to the TIMB_DMA dependencies silenced the
kconfig warning about unmet direct dependencies but it was wrong:
without MFD_TIMBERDALE, TIMB_DMA is useless as the driver has no
device to bind to.Signed-off-by: Jean Delvare
Cc: Vinod Koul
Cc: Dan Williams
Cc: Mauro Carvalho Chehab
Signed-off-by: Vinod Koul
14 Apr, 2014
1 commit
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The code to handle any length SG lists calls edma_resume()
even before edma_start() is called. This is incorrect
because edma_resume() enables edma events on the channel
after which CPU (in edma_start) cannot clear posted
events by writing to ECR (per the EDMA user's guide).Because of this EDMA transfers fail to start if due
to some reason there is a pending EDMA event registered
even before EDMA transfers are started. This can happen if
an EDMA event is a byproduct of device initialization.Fix this by calling edma_resume() only if it is not the
first batch of MAX_NR_SG elements.Without this patch, MMC/SD fails to function on DA850 EVM
with DMA. The behaviour is triggered by specific IP and
this can explain why the issue was not reported before
(example with MMC/SD on AM335x).Tested on DA850 EVM and AM335x EVM-SK using MMC/SD card.
Cc: stable@vger.kernel.org # v3.12.x+
Cc: Joel Fernandes
Acked-by: Joel Fernandes
Tested-by: Jon Ringle
Tested-by: Alexander Holler
Reported-by: Jon Ringle
Signed-off-by: Sekhar Nori
Signed-off-by: Vinod Koul
10 Apr, 2014
1 commit
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Pull slave-dmaengine updates from Vinod Koul:
- New driver for Qcom bam dma
- New driver for RCAR peri-peri
- New driver for FSL eDMA
- Various odd fixes and updates thru the subsystem* 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma: (29 commits)
dmaengine: add Qualcomm BAM dma driver
shdma: add R-Car Audio DMAC peri peri driver
dmaengine: sirf: enable generic dt binding for dma channels
dma: omap-dma: Implement device_slave_caps callback
dmaengine: qcom_bam_dma: Add device tree binding
dma: dw: Add suspend and resume handling for PCI mode DW_DMAC.
dma: dw: allocate memory in two stages in probe
Add new line to test result strings produced in verbose mode
dmaengine: pch_dma: use tasklet_kill in teardown
dmaengine: at_hdmac: use tasklet_kill in teardown
dma: cppi41: start tear down only if channel is busy
usb: musb: musb_cppi41: Dont reprogram DMA if tear down is initiated
dmaengine: s3c24xx-dma: make phy->irq signed for error handling
dma: imx-dma: Add missing module owner field
dma: imx-dma: Replace printk with dev_*
dma: fsl-edma: fix static checker warning of NULL dereference
dma: Remove comment about embedding dma_slave_config into custom structs
dma: mmp_tdma: move to generic device tree binding
dma: mmp_pdma: add IRQF_SHARED when request irq
dma: edma: Fix memory leak in edma_prep_dma_cyclic()
...
05 Apr, 2014
2 commits
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Conflicts:
drivers/dma/MakefileSigned-off-by: Vinod Koul
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Add the DMA engine driver for the QCOM Bus Access Manager (BAM) DMA controller
found in the MSM 8x74 platforms.Each BAM DMA device is associated with a specific on-chip peripheral. Each
channel provides a uni-directional data transfer engine that is capable of
transferring data between the peripheral and system memory (System mode), or
between two peripherals (BAM2BAM).The initial release of this driver only supports slave transfers between
peripherals and system memory.Signed-off-by: Andy Gross
Tested-by: Stanimir Varbanov
Signed-off-by: Vinod Koul
04 Apr, 2014
21 commits
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We can move the handling of the DMA synchronisation control out of the
prepare functions; this can be pre-calculated when the DMA channel has
been allocated, so we don't need to duplicate this in both prepare
functions.Acked-by: Tony Lindgren
Acked-by: Vinod Koul
Signed-off-by: Russell King -
Move the interrupt handling for OMAP2+ into omap-dma, rather than using
the legacy support in the platform code.Acked-by: Tony Lindgren
Acked-by: Vinod Koul
Signed-off-by: Russell King -
Export the DMA register information from the SoC specific data, such
that we can access the registers directly in omap-dma.c, mapping the
register region ourselves as well.Rather than calculating the DMA channel register in its entirety for
each access, we pre-calculate an offset base address for the allocated
DMA channel and then just use the appropriate register offset.Acked-by: Tony Lindgren
Acked-by: Vinod Koul
Signed-off-by: Russell King -
Provide a function to read the CSAC/CDAC register, working around the
OMAP 3.2/3.3 erratum (which requires two reads of the register if the
first returned zero.Acked-by: Tony Lindgren
Acked-by: Vinod Koul
Signed-off-by: Russell King -
Provide a pair of channel register accessors, and a pair of global
accessors for non-channel specific registers.Acked-by: Tony Lindgren
Acked-by: Vinod Koul
Signed-off-by: Russell King -
We don't need to read-modify-write the CCR register; we already know
what value it should contain at this point. Use the cached CCR value
when setting the enable bit.Acked-by: Tony Lindgren
Acked-by: Vinod Koul
Signed-off-by: Russell King -
We don't need to issue a barrier for every segment of a DMA transfer;
doing this just once per descriptor will do.Acked-by: Tony Lindgren
Acked-by: Vinod Koul
Signed-off-by: Russell King -
Move the clnk_ctrl setup to the preparation functions, saving its
value in the omap_desc. This only needs to be set once per descriptor,
not for each segment, so set it in omap_dma_start_desc() rather than
omap_dma_start().Acked-by: Tony Lindgren
Acked-by: Vinod Koul
Signed-off-by: Russell King -
The only thing which changes is which registers are written, so put this
in local variables instead. This results in smaller code.Acked-by: Tony Lindgren
Acked-by: Vinod Koul
Signed-off-by: Russell King -
Consolidate clearing of the channel status register, rather than open
coding the same functionality in two places.Acked-by: Tony Lindgren
Acked-by: Vinod Koul
Signed-off-by: Russell King -
Since we record the CCR register in the dma transaction, we can move the
processing of the iframe buffering errata out of the omap_dma_start().
Move it to the preparation functions.Acked-by: Tony Lindgren
Acked-by: Vinod Koul
Signed-off-by: Russell King -
Provide our own set of more complete register definitions; this allows
us to get rid of the meaningless 1 << n constants scattered throughout
this code.Acked-by: Tony Lindgren
Acked-by: Vinod Koul
Signed-off-by: Russell King -
Consolidate the setup of the channel control register. Prepare the
basic value in the preparation of the DMA descriptor, and write it into
the register upon descriptor execution.Acked-by: Tony Lindgren
Acked-by: Vinod Koul
Signed-off-by: Russell King -
Consolidate the setup of the channel source destination parameters
register. This way, we calculate the required CSDP value when we setup
a transfer descriptor, and only write it to the device registers once
when we start the descriptor.Acked-by: Tony Lindgren
Acked-by: Vinod Koul
Signed-off-by: Russell King -
Read the current DMA position from the hardware directly rather than via
arch/arm/plat-omap/dma.c.Acked-by: Tony Lindgren
Acked-by: Vinod Koul
Signed-off-by: Russell King -
Program the non-cyclic mode DMA start/stop directly, rather than via
arch/arm/plat-omap/dma.c.Acked-by: Tony Lindgren
Acked-by: Vinod Koul
Signed-off-by: Russell King -
There's no need to keep writing registers which don't change value in
omap_dma_start_sg(). Move this into omap_dma_start_desc() and merge
the register updates together.Acked-by: Tony Lindgren
Acked-by: Vinod Koul
Signed-off-by: Russell King -
Program the transfer parameters directly into the hardware, rather
than using the functions in arch/arm/plat-omap/dma.c.Acked-by: Tony Lindgren
Acked-by: Vinod Koul
Signed-off-by: Russell King -
Provide and use a hook to obtain the underlying DMA platform operations
so that omap-dma.c can access the hardware more directly without
involving the legacy DMA driver.Acked-by: Tony Lindgren
Acked-by: Vinod Koul
Signed-off-by: Russell King -
Use devm_kzalloc() to allocate omap_dmadev() so that we don't need
complex error cleanup paths.Acked-by: Tony Lindgren
Acked-by: Vinod Koul
Signed-off-by: Russell King
29 Mar, 2014
3 commits
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Add support Audio DMAC peri peri driver
for Renesas R-Car Gen2 SoC, using 'shdma-base'
DMA driver framework.Signed-off-by: Kuninori Morimoto
[fixed checkpatch error]
Signed-off-by: Vinod Koul -
move to support of_dma_request_slave_channel() and dma_request_slave_channel.
we add a xlate() to let dma clients be able to find right dma_chan by generic
"dmas" properties in dts.Cc: Mark Rutland
Cc: Lars-Peter Clausen
Signed-off-by: Barry Song
Acked-by: Arnd Bergmann
Signed-off-by: Vinod Koul -
With the callback implemented omap-dma can provide information to client
drivers regarding to supported address widths, directions, residue
granularity, etc.Signed-off-by: Peter Ujfalusi
Acked-by: Tony Lindgren
Signed-off-by: Vinod Koul
26 Mar, 2014
3 commits
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This is to disable/enable DW_DMAC hw during late suspend/early resume.
Since DMA is providing service to other clients (eg: SPI, HSUART),
we need to ensure DMA suspends after the clients and resume
before the clients are active.Signed-off-by: Chew, Chiau Ee
Acked-by: Andy Shevchenko
Acked-by: Viresh Kumar
Signed-off-by: Vinod Koul -
This makes the probe() function a little bit clearer.
Signed-off-by: Andy Shevchenko
Signed-off-by: Vinod Koul -
Prevents test result strings from being output on same line. Issue will
happen with verbose and multi-iteration modes enabled.Signed-off-by: Jerome Blin
Signed-off-by: Vinod Koul
17 Mar, 2014
3 commits
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As discussed in [1] the tasklet_disable is not a proper function for teardown.
We need to ensure irq is disabled, followed by ensuring that don't schedule any
more tasklets and then its safe to use tasklet_kill().Here in pch dma driver we need to use free_irq() before tasklet_kill(). So move
up the free_irq() which will ensure that the irq is disabled and also wait till
all scheduled interrupts are executed by invoking synchronize_irq().[1]: http://lwn.net/Articles/588457/
Reported-by: Thomas Gleixner
Signed-off-by: Vinod Koul -
As discussed in [1] the tasklet_disable is not a proper function for teardown.
We need to ensure irq is disabled, followed by ensuring that don't schedule any
more tasklets and then its safe to use tasklet_kill().Here in at_hdmac driver we use free_irq() before tasklet_kill(). The free_irq()
will ensure that the irq is disabled and also wait till all scheduled interrupts
are executed by invoking synchronize_irq(). So we need to only do tasklet_kill()
after invoking free_irq()[1]: http://lwn.net/Articles/588457/
Reported-by: Thomas Gleixner
Acked-by: Nicolas Ferre
Reviewed-by: Thomas Gleixner
Signed-off-by: Vinod Koul
11 Mar, 2014
2 commits
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Start the channel tear down only if the channel is busy, else just
bail out. In some cases its seen that by the time the tear down is
initiated the cppi completes the DMA, especially in ISOCH transfers.Signed-off-by: George Cherian
Signed-off-by: Vinod Koul -
There is a bug in s3c24xx_dma_probe() where we do:
phy->irq = platform_get_irq(pdev, i);
if (phy->irq < 0) {The problem is that "phy->irq" is unsigned so the error handling doesn't
work. I have changed it to signed.Signed-off-by: Dan Carpenter
Signed-off-by: Vinod Koul
06 Mar, 2014
1 commit
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Signed-off-by: Alexander Shiyan
Signed-off-by: Vinod Koul
