27 Jan, 2021
2 commits
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* origin/ls_v2020.04:
net: memac_phy: add a timeout to MDIO operations
armv8: lx2: SVR_SOC_VER: Mask CAN_FD and security bit -
We have encountered circumstances when a board design does not include
pull-up resistors on the external MDIO buses which are not used. This
leads to the MDIO data line not being pulled-up, thus the MDIO controller
will always see the line as busy.Without a timeout in the MDIO bus driver, the execution is stuck in an
infinite loop when any access is initiated on that external bus.Add a timeout in the driver so that we are protected in this
circumstance. This is similar to what is being done in the Linux
xgmac_mdio driver.Signed-off-by: Ioana Ciornei
20 Nov, 2020
1 commit
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* origin/dn_uboot: (14 commits)
Revert "mmc: move mmc_power_cycle() after controller initialization"
Revert "mmc: rework mmc_set_initial_state"
board: freescale: vid.c: add parantheses to fix build warning
net: pfe_eth: read PFE ESBC header flash with spi_flash_read API
lx2160a: Fix address for secure boot headers
...
09 Nov, 2020
1 commit
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Read PFE ESBC header flash with spi_flash_read API
- logs as follows,
Net: SF: Detected s25fs512s with page size 256 Bytes, erase size 256
KiB, total 64 MiB
"Synchronous Abort" handler, esr 0x96000210
elr: 000000008206db44 lr : 0000000082004ea0 (reloc)
elr: 00000000b7ba6b44 lr : 00000000b7b3dea0
x0 : 00000000b79407e8 x1 : 0000000040640000
x2 : 0000000000000050 x3 : 0000000000000000
x4 : 000000000000000a x5 : 0000000000000050
x6 : 0000000000000366 x7 : 00000000b7942308
x8 : 00000000b76407c0 x9 : 0000000000000008
x10: 0000000000000044 x11: 00000000b7634d1c
x12: 000000000000004f x13: 0000000000000044
x14: 00000000b7634d98 x15: 00000000b76407c0
x16: 0000000000000000 x17: 0000000000000000
x18: 00000000b7636dd8 x19: 0000000000000000
x20: 00000000b79407d0 x21: 00000000b79407e8
x22: 0000000040640000 x23: 00000000b7634e58
x24: 0000000000000000 x25: 0000000003800000
x26: 00000000b7bdd000 x27: 0000000000000000
x28: 0000000000000000 x29: 00000000b7634d10Code: d2800003 eb03005f 54000101 d65f03c0 (f8636826)
Resetting CPU ...Signed-off-by: Biwen Li
19 Oct, 2020
1 commit
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Conflicts:
arch/arm/cpu/armv8/Kconfig
drivers/pci/pcie_layerscape_fixup.c
drivers/video/imx/Makefile
drivers/video/nxp/Kconfig
drivers/video/nxp/Makefile
drivers/video/nxp/hdp/Makefile
drivers/video/nxp/hdp/test_base_sw.cSigned-off-by: Ye Li
09 Oct, 2020
1 commit
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As per hardware documentation, ECx_PMUX has precedence
over SerDes protocol.
For LX2160/LX2162 if DPMACs 17 and 18 are enabled as SGMII
through SerDes protocol but ECx_PMUX configured them as RGMII,
then the ports will be configured as RGMII and not SGMII.Signed-off-by: Razvan Ionut Cirjan
29 Sep, 2020
9 commits
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Add compatible string "gianfar" support and update the
device-tree-bindings doc.Signed-off-by: Hou Zhiqiang
Reviewed-by: Vladimir Oltean -
The info of fixed-link PHY is described in DT node instead of
getting from MII, so detect the fixed-link PHY DT node first,
if it doesn't exist then probe the MII.Signed-off-by: Vladimir Oltean
Signed-off-by: Hou Zhiqiang -
For the platforms on which the eTSEC driver uses DM_ETH, convert its
MDIO controller code to also use DM_MDIO.Note that for handling the TBI PHY (the MAC PCS for SGMII), we still
don't register a udevice for it, since we can drive it locally and there
is no point in doing otherwise.Signed-off-by: Vladimir Oltean
Signed-off-by: Hou Zhiqiang -
The MII management register block offset is different between
gianfar and etsec2 compatible devices, this patch is to fix
this issue by adding driver data for different compatible
string.Fixes: 2932c5a802a9 ("net: tsec: fsl_mdio: add DM MDIO support")
Signed-off-by: Hou Zhiqiang
Reviewed-by: Vladimir Oltean -
Use virtual address to access the MII block registers instead
of physical address.Signed-off-by: Hou Zhiqiang
Reviewed-by: Vladimir Oltean -
It is utterly pointless to require an MDIO bus pointer for a fixed PHY
device. The fixed.c implementation does not require it, only
phy_device_create. Fix that.Signed-off-by: Vladimir Oltean
Signed-off-by: Hou Zhiqiang
Reviewed-by: Hou Zhiqiang -
When an eTSEC is configured to use TBI, configuration of the
TBI is done through the MIIM registers for that eTSEC.
For example, if a TBI interface is required on eTSEC2, then
the MIIM registers starting at offset 0x2_5520 are used to
configure it.Fixes: 9a1d6af55ecd ("net: tsec: Add driver model ethernet support")
Signed-off-by: Hou Zhiqiang
Reviewed-by: Vladimir Oltean
Tested-by: Vladimir Oltean
Reviewed-by: Priyanka Jain -
The current code accesses eTSEC registers using physical
address directly, it's not correct, though no problem on
current platforms. It won't work on platforms, which does
not support 1:1 virtual-physical address map.Signed-off-by: Hou Zhiqiang
Reviewed-by: Vladimir Oltean
Tested-by: Vladimir Oltean
Reviewed-by: Priyanka Jain -
Allow the MDIO devices to be probed based on the device tree.
Signed-off-by: Madalin Bucur
Signed-off-by: Priyanka Jain
18 Sep, 2020
1 commit
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Fix Coverity issue: RESOURCE_LEAK.
leaked_storage: Variable addr going out of scope leaks the storage it
points to.Fixes: 171b3932a6c5 ("net: pfe_eth: Use spi_flash_read API to access
flash memory")
Signed-off-by: Kuldeep Singh
11 Sep, 2020
2 commits
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The next DPMAC was always verified if it is enabled. In case of
DPMAC@6, the DPMAC@7 is verified. As DPMAC@7 is disabled, DPMAC@6 will
be considered disabled and not detected by uboot.Signed-off-by: Grigore Popescu
Signed-off-by: Ioana Ciornei -
correction in delay implementation before we exit out of tx timeout.
Signed-off-by: Chaitanya Sakinam
08 Sep, 2020
1 commit
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LX2162 is LX2160 based SoC, it has same die as of LX2160
with different packaging.LX2162A support 64-bit 2.9GT/s DDR4 memory, i2c, micro-click module,
microSD card, eMMC support, serial console, qspi nor flash, qsgmii,
sgmii, 25g, 40g, 50g network interface, one usb 3.0 and serdes
interface to support three PCIe gen3 interface.Signed-off-by: Meenakshi Aggarwal
02 Sep, 2020
1 commit
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PFE DDR addresses are now stored on to a stack varaiable rather
dynamic allocation.Signed-off-by: Chaitanya Sakinam
25 Aug, 2020
3 commits
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Force the start of the PHY after Linux reboot.
Issue: ALB-290
Signed-off-by: Costin Carabas -
Activate Micrel PHY KSZ9031 for s32v234evb 28899.
Signed-off-by: Stoica Cosmin-Stefan
Signed-off-by: Larisa Grigore -
Update the ENET registers definition and initialisation
of MIB counters according to new S32V234 ENET memory map.Signed-off-by: Stoica Cosmin-Stefan
Signed-off-by: Dan Nica
29 Jul, 2020
1 commit
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To avoid build break on S32, wrap sys_proto.h with CONFIG_MX6. It
is used for fuse check on iMX6UL.Signed-off-by: Ye Li
20 Jul, 2020
1 commit
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Conflicts:
drivers/net/KconfigMerge with dn_uboot for secondary merge window of lf_uboot.
Signed-off-by: Ye Li
16 Jun, 2020
1 commit
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Current MDIO wait time is too long, which introduce long delay when
PHY negotiation register checking. Reduce it to 10usSigned-off-by: Ye Li
Reviewed-by: Fugang Duan
(cherry picked from commit a2cc69517416eb0246437e610333bf93e234708e)
11 Jun, 2020
2 commits
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The correct setting for the RGMII ports on LS1012ARDB is to
enable delay on both Rx and Tx so the interface mode used should
be PHY_INTERFACE_MODE_RGMII_IDSigned-off-by: Chaitanya Sakinam
Signed-off-by: Anji J -
The correct setting for the RGMII ports on LS1012ARDB is to
enable delay on both Rx and Tx so the interface mode used should
be PHY_INTERFACE_MODE_RGMII_IDSigned-off-by: Chaitanya Sakinam
Signed-off-by: Anji J
03 Jun, 2020
3 commits
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This driver is used for the Ethernet switch integrated into LS1028A NXP.
Felix on LS1028A has 4 front panel ports and two internal ports, I/O
to/from the switch is done through an ENETC Ethernet interface.
The 4 front panel ports are available as Ethernet interfaces and can be
used with the typical network commands like tftp.Signed-off-by: Alex Marginean
Tested-by: Michael Walle
Signed-off-by: Vladimir Oltean
Signed-off-by: Claudiu Manoil -
The DSA sandbox driver is used for DSA unit testing. It implements a
simple 4 port switch that uses a very simple tag to identify the ports.
The DSA driver comes paired with an Ethernet driver that loops packets
back and can selectively filter traffic on DSA switch ports.Signed-off-by: Alex Marginean
Signed-off-by: Claudiu Manoil -
DSA stands for Distributed Switch Architecture and it covers switches that
are connected to the CPU through an Ethernet link and generally use frame
tags to pass information about the source/destination ports to/from CPU.
Front panel ports are presented as regular ethernet devices in U-Boot and
they are expected to support the typical networking commands.
DSA switches may be cascaded, DSA class code does not currently support
this.Signed-off-by: Alex Marginean
Signed-off-by: Vladimir Oltean
Signed-off-by: Claudiu Manoil
08 May, 2020
1 commit
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Conflicts:
drivers/spi/fsl_qspi.c
include/configs/mx6sxsabresd.h
include/configs/mx6ul_14x14_evk.h
include/configs/mx6ullevk.hAccording to the feedback from Priyanka and Ashish, the qspi framework has
big changes to port the existing Linux driver to replace the old qspi driver.
The patches has been accepted in the u-boot upstream and will be in 2020.07So, the suggestion is to override the imx_uboot conflicts, which means some
platform support is droppped such as the imx7ulp(not on the Linux upstream)
and some imx local patches need be reworked based on community new qspi driverThis need Li Ye and Han Xu to rework on the imx port
Signed-off-by: Jason Liu
06 May, 2020
8 commits
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Reset PHY once is enough that can reduce the time cost
to get IP after the first time.Reviewed-by: Frank Li
Signed-off-by: Fugang Duan
(cherry picked from commit 2342d9670a6e349a462e24febdc085aac3bedcee) -
Update dwc qos driver for i.MX8DXL
Signed-off-by: Fugang Duan
(cherry picked from commit d1e718565972495c99345ee8119651ffa14a3238) -
Implement the read_rom_hwaddr callback to load MAC address from fuse
for imx8m platforms.Signed-off-by: Ye Li
Reviewed-by: Fugang Duan
(cherry picked from commit d00d6d0a22ba734f76444621a17f985ffba50705) -
imx_get_mac_from_fuse is used to load MAC address from fuse. On imx8mp,
we have two different ENET controllers and both need to call this
function. So decouple its declare from fec driver.Signed-off-by: Ye Li
Reviewed-by: Fugang Duan
(cherry picked from commit e442274ddd2cb6e9c4103e91cd284bfb01a4a636) -
Implement the callbacks to get phy mode interface and txclk
rate configuration.Reviewed-by: Ye Li
Signed-off-by: Fugang Duan
(cherry picked from commit ad2f34236694493b94c2cf6801eef4b7212eb89b) -
Add dwc eqos for imx support.
Reviewed-by: Ye Li
Signed-off-by: Fugang Duan
(cherry picked from commit 52751a41c92a719891c8154cfc488165cc42f713) -
Add RX delay enable support for RTL8211F PHY.
Reviewed-by: Ye Li
Signed-off-by: Fugang Duan
(cherry picked from commit 8e55d1e0bea57c0671a51258c48306be0066ae7c) -
Add the fuse checking in drivers, when the module is disabled in fuse,
the driver will not work.Changed drivers: BEE, GPMI, APBH-DMA, ESDHC, FEC, QSPI, ECSPI, I2C,
USB-EHCI, GIS, LCDIF and EPDC.Signed-off-by: Ye Li
(cherry picked from commit 1704e116f9b39aeb99201919a18bc2b1e19a980e)
(cherry picked from commit 2d3b5df8530cd5ef883750378838dea7c40259af)
(cherry picked from commit 6e8c9ae136bee8ec0121c1db4b935510caad09db)
(cherry picked from commit 99b54a6965904a879afdb6883a519de726cb4e96)
