Eric Lee / smarc-uboot

29 Apr, 2015

1 commit

  • 789fcfd7a   MLK-10524: iMX6x: Implement workaround for Cortex-A9 errata 845369 ... Browse Code »

    Under very rare timing circumstances, transitioning into streaming
    mode might create a data corruption. Present on Two or more processors
    or 1 core with ACP, all revisions. This erratum can be worked round
    by setting bit[22] of the undocumented Diagnostic Control Register to 1.

    Signed-off-by: Nitin Garg
    (cherry picked from commit 70ad44e523680de67dd8b7a7505d7f27799980ee)

    Nitin Garg
     

10 Apr, 2015

1 commit

31 Mar, 2015

1 commit

28 Mar, 2015

1 commit

13 Mar, 2015

5 commits

  • 3bde6888c   README: remove description about driver model configuration options (again) ... Browse Code »

    The Driver Model description in README was removed by commit
    65eb659e56fa (README: remove description about driver model
    configuration options), and was revived by mistake by commit
    b79dadf846e5 when resolving the conflict.

    Signed-off-by: Masahiro Yamada
    Cc: Tom Rini
    Acked-by: Simon Glass

    Masahiro Yamada
     
  • 9b4d65f91   ARM: Introduce erratum workaround for 621766 ... Browse Code »

    621766: Under a specific set of conditions, executing a sequence of
    NEON or vfp load instructions can cause processor deadlock
    Impacts: Every Cortex-A8 processors with revision lower than r2p1
    Work around: Set L1NEON to 1

    Based on ARM errata Document revision 20.0 (13 Nov 2010)

    Signed-off-by: Nishanth Menon
    Tested-by: Matt Porter
    Reviewed-by: Tom Rini

    Nishanth Menon
     
  • 5902f4ce0   ARM: Introduce erratum workaround for 430973 ... Browse Code »

    430973: Stale prediction on replaced inter working branch causes
    Cortex-A8 to execute in the wrong ARM/Thumb state
    Impacts: Every Cortex-A8 processors with revision lower than r2p1
    Work around: Set IBE to 1

    Based on ARM errata Document revision 20.0 (13 Nov 2010)

    Signed-off-by: Nishanth Menon
    Tested-by: Matt Porter
    Reviewed-by: Tom Rini

    Nishanth Menon
     
  • b45c48a7c   ARM: Introduce erratum workaround for 454179 ... Browse Code »

    454179: Stale prediction may inhibit target address misprediction on
    next predicted taken branch
    Impacts: Every Cortex-A8 processors with revision lower than r2p1
    Work around: Set IBE and disable branch size mispredict to 1

    Also provide a hook for SoC specific handling to take place if needed.

    Based on ARM errata Document revision 20.0 (13 Nov 2010)

    Signed-off-by: Nishanth Menon
    Tested-by: Matt Porter
    Reviewed-by: Tom Rini

    Nishanth Menon
     
  • c616a0df2   ARM: Introduce erratum workaround for 798870 ... Browse Code »

    Add workaround for Cortex-A15 ARM erratum 798870 which says
    "If back-to-back speculative cache line fills (fill A and fill B) are
    issued from the L1 data cache of a CPU to the L2 cache, the second
    request (fill B) is then cancelled, and the second request would have
    detected a hazard against a recent write or eviction (write B) to the
    same cache line as fill B then the L2 logic might deadlock."

    Implementations for SoC families such as Exynos, OMAP5/DRA7 etc
    will be widely different.

    Every SoC has slightly different manner of setting up access to L2ACLR
    and similar registers since the Secure Monitor handling of Secure
    Monitor Call(smc) is diverse. Hence an weak function is introduced
    which may be overriden to implement SoC specific accessor implementation.

    Based on ARM errata Document revision 18.0 (22 Nov 2013)

    Signed-off-by: Nishanth Menon
    Tested-by: Matt Porter
    Reviewed-by: Tom Rini

    Nishanth Menon
     

11 Mar, 2015

1 commit

06 Mar, 2015

1 commit

05 Mar, 2015

3 commits

  • 02ebe6f70   Merge branch 'master' of git://www.denx.de/git/u-boot-imx Browse Code »
    Tom Rini
     
  • db910353a   arm: spl: Allow board_init_r() to run with a larger stack ... Browse Code »
    29

    At present SPL uses a single stack, either CONFIG_SPL_STACK or
    CONFIG_SYS_INIT_SP_ADDR. Since some SPL features (such as MMC and
    environment) require a lot of stack, some boards set CONFIG_SPL_STACK to
    point into SDRAM. They then set up SDRAM very early, before board_init_f(),
    so that the larger stack can be used.

    This is an abuse of lowlevel_init(). That function should only be used for
    essential start-up code which cannot be delayed. An example of a valid use is
    when only part of the SPL code is visible/executable, and the SoC must be set
    up so that board_init_f() can be reached. It should not be used for SDRAM
    init, console init, etc.

    Add a CONFIG_SPL_STACK_R option, which allows the stack to be moved to a new
    address before board_init_r() is called in SPL.

    The expected SPL flow (for CONFIG_SPL_FRAMEWORK) is documented in the README.

    Signed-off-by: Simon Glass
    For version 1:
    Acked-by: Albert ARIBAUD
    Reviewed-by: Stefan Roese
    Tested-by: Bo Shen
    Acked-by: Bo Shen
    Acked-by: Heiko Schocher
    Tested-by: Heiko Schocher

    Signed-off-by: Tom Rini

    Simon Glass
     
  • 73c38934d   ARM: tegra: support running in non-secure mode ... Browse Code »

    When the CPU is in non-secure (NS) mode (when running U-Boot under a
    secure monitor), certain actions cannot be taken, since they would need
    to write to secure-only registers. One example is configuring the ARM
    architectural timer's CNTFRQ register.

    We could support this in one of two ways:
    1) Compile twice, once for secure mode (in which case anything goes) and
    once for non-secure mode (in which case certain actions are disabled).
    This complicates things, since everyone needs to keep track of
    different U-Boot binaries for different situations.
    2) Detect NS mode at run-time, and optionally skip any impossible actions.
    This has the advantage of a single U-Boot binary working in all cases.

    (2) is not possible on ARM in general, since there's no architectural way
    to detect secure-vs-non-secure. However, there is a Tegra-specific way to
    detect this.

    This patches uses that feature to detect secure vs. NS mode on Tegra, and
    uses that to:

    * Skip the ARM arch timer initialization.

    * Set/clear an environment variable so that boot scripts can take
    different action depending on which mode the CPU is in. This might be
    something like:
    if CPU is secure:
    load secure monitor code into RAM.
    boot secure monitor.
    secure monitor will restart (a new copy of) U-Boot in NS mode.
    else:
    execute normal boot process

    Signed-off-by: Stephen Warren
    Signed-off-by: Tom Warren

    Stephen Warren
     

02 Mar, 2015

1 commit

26 Feb, 2015

1 commit

25 Feb, 2015

1 commit

17 Feb, 2015

1 commit

  • 189d257b7   cmd_eeprom: make it possible to define the used i2c bus ... Browse Code »

    A SoC like the i.MX6 supports more then one i2c bus. In oder to be
    able to use the eeprom command add a new define to specify the
    i2c bus to use. If CONFIG_SYS_I2C_EEPROM_BUS is not defined there
    is no functional change, else a call to i2c_set_bus_num(..) is
    done before calling i2c_read(..) and i2c_write(..).

    Signed-off-by: Christian Gmeiner
    Acked-by: Stefano Babic

    Christian Gmeiner
     

08 Feb, 2015

1 commit

30 Jan, 2015

3 commits

16 Jan, 2015

1 commit

06 Jan, 2015

2 commits

02 Jan, 2015

1 commit

19 Dec, 2014

1 commit

  • 1dfdd9ba4   ARM: Implement non-cached memory support ... Browse Code »

    Implement an API that can be used by drivers to allocate memory from a
    pool that is mapped uncached. This is useful if drivers would otherwise
    need to do extensive cache maintenance (or explicitly maintaining the
    cache isn't safe).

    The API is protected using the new CONFIG_SYS_NONCACHED_MEMORY setting.
    Boards can set this to the size to be used for the non-cached area. The
    area will typically be right below the malloc() area, but architectures
    should take care of aligning the beginning and end of the area to honor
    any mapping restrictions. Architectures must also ensure that mappings
    established for this area do not overlap with the malloc() area (which
    should remain cached for improved performance).

    While the API is currently only implemented for ARM v7, it should be
    generic enough to allow other architectures to implement it as well.

    Signed-off-by: Thierry Reding
    Signed-off-by: Simon Glass
    Signed-off-by: Tom Warren

    Thierry Reding
     

18 Dec, 2014

1 commit

  • 0ff7e585d   fastboot: handle flash write to GPT partitions ... Browse Code »

    Implement a feature to allow fastboot to write the downloaded image
    to the space reserved for the Protective MBR and the Primary GUID
    Partition Table.
    Additionally, prepare and write the Backup GUID Partition Table.

    Signed-off-by: Steve Rae
    Tested-by: Lukasz Majewski
    [Test HW: Exynos4412 - Trats2]

    Steve Rae
     

09 Dec, 2014

1 commit

08 Dec, 2014

1 commit

  • b97300b62   spl: MMC U-Boot image load from raw partition ... Browse Code »

    Raw images of U-Boot can be stored inside MMC partitions, so it makes sense to
    read the partition table, looking for a partition number instead of using
    a fixed sector address.

    Signed-off-by: Paul Kocialkowski
    Reviewed-by: Tom Rini
    [trini: Only add mmc_load_image_raw_partition() when
    CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION to avoid warning, add missing
    conversion in spl_mmc_load_image()]
    Signed-off-by: Tom Rini

    Paul Kocialkowski
     

06 Dec, 2014

1 commit

05 Dec, 2014

1 commit

27 Nov, 2014

1 commit

25 Nov, 2014

1 commit

23 Nov, 2014

2 commits

  • 6c7750900   hush: add CONFIG_HUSH_PARSER to Kconfig ... Browse Code »

    The README file states that the macros beginning with "CONFIG_SYS_"
    depend on the hardware etc. and should not be meddled with if you do
    not what you're doing.
    We have already screwed up with this policy; we have given the prefix
    "CONFIG_SYS_" to many user-selectable configurations.
    Here, "CONFIG_SYS_HUSH_PARSER" is one of them. Users can enable it
    if they want to use a more powerful command line parser, or disable it
    if they only need a simple one.

    This commit attempts to rename CONFIG_SYS_HUSH_PARSER to
    CONFIG_HUSH_PARSER and move it to Kconfig.

    Every board maintainer is expected to enable CONFIG_HUSH_PARSER
    (= add "CONFIG_HUSH_PARSER=y" to his defconfig file) and remove
    "#define CONFIG_SYS_HUSH_PARSER" from his header file.

    Signed-off-by: Masahiro Yamada

    Masahiro Yamada
     
  • 59e890ef7   fs: make it possible to read the filesystem UUID ... Browse Code »

    Some filesystems have a UUID stored in its superblock. To
    allow using root=UUID=... for the kernel command line we
    need a way to read-out the filesystem UUID.

    changes rfc -> v1:
    - make the environment variable an option parameter. If not
    given, the UUID is printed out. If given, it is stored in the env
    variable.
    - corrected typos
    - return error codes

    changes v1 -> v2:
    - fix return code of do_fs_uuid(..)
    - document do_fs_uuid(..)
    - implement fs_uuid_unsuported(..) be more consistent with the
    way other optional functionality works

    changes v2 -> v3:
    - change ext4fs_uuid(..) to make use of #if .. #else .. #endif
    construct to get rid of unreachable code

    Hit any key to stop autoboot: 0
    => fsuuid
    fsuuid - Look up a filesystem UUID

    Usage:
    fsuuid :
    - print filesystem UUID
    fsuuid :
    - set environment variable to filesystem UUID

    => fsuuid mmc 0:1
    d9f9fc05-45ae-4a36-a616-fccce0e4f887
    => fsuuid mmc 0:2
    eb3db83c-7b28-499f-95ce-9e0bb21cda81
    => fsuuid mmc 0:1 uuid1
    => fsuuid mmc 0:2 uuid2
    => printenv uuid1
    uuid1=d9f9fc05-45ae-4a36-a616-fccce0e4f887
    => printenv uuid2
    uuid2=eb3db83c-7b28-499f-95ce-9e0bb21cda81
    =>

    Signed-off-by: Christian Gmeiner
    Acked-by: Stephen Warren

    Christian Gmeiner
     

21 Nov, 2014

2 commits

17 Nov, 2014

1 commit

08 Nov, 2014

1 commit