17 Mar, 2016
1 commit
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Now that ACPI is supported on QEMU, enable it.
Signed-off-by: Bin Meng
Reviewed-by: Simon Glass
16 Mar, 2016
4 commits
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NFS loading works on DRA7 variants, remove the undefinition.
Signed-off-by: Andrew F. Davis
Reviewed-by: Tom Rini -
Now that we have all the bits and pieces ready for EFI payload loading
support, hook them up in Makefiles and KConfigs so that we can build.Signed-off-by: Alexander Graf
Reviewed-by: Simon Glass
Tested-by: Simon Glass
[trini: Enable only when we of OF_LIBFDT, disable on kwb and colibri_pxa270]
Signed-off-by: Tom Rini -
This adds support for the MUSB USB dual-role controller in peripheral mode,
with configuration options for the fastboot USB gadget.At this point, flashing the internal eMMC is support.
Signed-off-by: Paul Kocialkowski
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The Amazon Kindle Fire (first generation) codename kc1 is a tablet that was
released by Amazon back in 2011.It is using an OMAP4430 SoC GP version, which allows running U-Boot and the
U-Boot SPL from the ground up.Signed-off-by: Paul Kocialkowski
15 Mar, 2016
6 commits
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This is based on the davinci da850evm. It can boot from either the
on-board 16MB flash or from a microSD card. It also reads board
information from an I2C EEPROM.The EV3 itself initally boots from write-protected EEPROM, so no
u-boot SPL is needed.Signed-off-by: David Lechner
Reviewed-by: Tom Rini -
Enable support for PMMC the TI power processor on K2G. This processor
manages all power management related activities on the SoC and and
allows the Operating Systems on compute processors such as ARM, DSP to
offload the power logic away into the power processor.Signed-off-by: Nishanth Menon
Reviewed-by: Tom Rini -
There are already two FIT options in Kconfig but the CONFIG options are
still in the header files. We need to do a proper move to fix this.Move these options to Kconfig and tidy up board configuration:
CONFIG_FIT
CONFIG_OF_BOARD_SETUP
CONFIG_OF_SYSTEM_SETUP
CONFIG_FIT_SIGNATURE
CONFIG_FIT_BEST_MATCH
CONFIG_FIT_VERBOSE
CONFIG_OF_STDOUT_VIA_ALIAS
CONFIG_RSAUnfortunately the first one is a little complicated. We need to make sure
this option is not enabled in SPL by this change. Also this option is
enabled automatically in the host builds by defining CONFIG_FIT in the
image.h file. To solve this, add a new IMAGE_USE_FIT #define which can
be used in files that are built on the host but must also build for U-Boot
and SPL.Note: Masahiro's moveconfig.py script is amazing.
Signed-off-by: Simon Glass
[trini: Add microblaze change, various configs/ re-applies]
Signed-off-by: Tom Rini -
Move this option to Kconfig and tidy up existing boards.
Signed-off-by: Simon Glass
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Kconfig options must defined in the defconfig files. Since RSA_SOFTWARE_EXP
relies on CONFIG_DM, unless it is set in kconfig we cannot enable RSA.
Remove the hacks which enable CONFIG_DM in header files and update the
defconfig.Signed-off-by: Simon Glass
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Various boards have the wrong Kconfig ordering now. To avoid a misleading
diff in the next patch, reorder the configuration correctly.
Signed-off-by: Simon Glass
09 Mar, 2016
2 commits
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MIPS EL boards should define CONFIG_USE_PRIVATE_LIBGCC=y to work
with EB-only toolchains like the one from kernel.org. If one do
not globally set CONFIG_USE_PRIVATE_LIBGCC=y, the build fails with:/opt/gcc-4.9.0-nolibc/mips-linux/bin/mips-linux-ld.bfd: /opt/gcc-4.9.0-nolibc/mips-linux/bin/../lib/gcc/mips-linux/4.9.0/libgcc.a(_lshrdi3.o): compiled for a big endian system and target is little endian
/opt/gcc-4.9.0-nolibc/mips-linux/bin/mips-linux-ld.bfd: /opt/gcc-4.9.0-nolibc/mips-linux/bin/../lib/gcc/mips-linux/4.9.0/libgcc.a(_lshrdi3.o): endianness incompatible with that of the selected emulation
/opt/gcc-4.9.0-nolibc/mips-linux/bin/mips-linux-ld.bfd: failed to merge target specific data of file /opt/gcc-4.9.0-nolibc/mips-linux/bin/../lib/gcc/mips-linux/4.9.0/libgcc.a(_lshrdi3.o)
/opt/gcc-4.9.0-nolibc/mips-linux/bin/mips-linux-ld.bfd: /opt/gcc-4.9.0-nolibc/mips-linux/bin/../lib/gcc/mips-linux/4.9.0/libgcc.a(_ashldi3.o): compiled for a big endian system and target is little endian
/opt/gcc-4.9.0-nolibc/mips-linux/bin/mips-linux-ld.bfd: /opt/gcc-4.9.0-nolibc/mips-linux/bin/../lib/gcc/mips-linux/4.9.0/libgcc.a(_ashldi3.o): endianness incompatible with that of the selected emulation
/opt/gcc-4.9.0-nolibc/mips-linux/bin/mips-linux-ld.bfd: failed to merge target specific data of file /opt/gcc-4.9.0-nolibc/mips-linux/bin/../lib/gcc/mips-linux/4.9.0/libgcc.a(_ashldi3.o)
/work/git-trees/u-boot-mips/Makefile:1171: recipe for target 'u-boot' failedOne example for a failing build is Travis CI.
Signed-off-by: Daniel Schwierzeck
Reviewed-by: Purna Chandra Mandal -
- Add required UBI/UBIFS config definitions
- Add reasonable MTD partition layout
- Remove JFFS2 config definitions
- Drop some CFI verbage and definitions
- Make comment 'one-liners' truly one line
- Improve readability and content arrangementSigned-off-by: Derald D. Woods
Reviewed-by: Tom Rini
01 Mar, 2016
1 commit
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This introduces some minor cleanups, regarding aspects such as board name, code
and headers organization as well as deprecated and missing config options.Signed-off-by: Paul Kocialkowski
Reviewed-by: Tom Rini
29 Feb, 2016
4 commits
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The chains of "depends on " in the current Kconfig is
clumsy. The idea here is to allow users to choose a SoC group first
(SoC group consists of some SoCs that can coexist in one binary).
Then, allow to enable/disable each SoC support in the selected SoC
group. This makes the Kconfig menu clearer.Signed-off-by: Masahiro Yamada
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PH1-Pro5 support and ProXstream2/PH1-LD6b support can coexist in one
image and there is bit more room in SPL to accommodate all of them.
Merge uniphier_pro5_defconfig into uniphier_pxs2_defconfig.Signed-off-by: Masahiro Yamada
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Enable the driver in all UniPhier defconfig files and add some
needed defines to the common files.Signed-off-by: Masahiro Yamada
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This allows to use the "gpio" command.
Signed-off-by: Masahiro Yamada
Acked-by: Simon Glass
26 Feb, 2016
2 commits
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Enable this so that tracing works with sandbox.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
This has got out of order: fix it.
Signed-off-by: Simon Glass
25 Feb, 2016
9 commits
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Define prompt for cm-t43.
Cc: Tom Rini
Cc: Albert Aribaud
Cc: Igor Grinberg
Signed-off-by: Nikita Kiryanov
Reviewed-by: Tom Rini -
Add full support for SPI flash chips to future-proof U-Boot for cm-t43.
Cc: Tom Rini
Cc: Albert Aribaud
Cc: Igor Grinberg
Signed-off-by: Nikita Kiryanov
Reviewed-by: Tom Rini -
Move CONFIG_DM_SERIAL to cm_t43_defconfig. This forces us to update the
CONFIG_SYS_NS16550_REG_SIZE value for SPL.Cc: Tom Rini
Cc: Albert Aribaud
Cc: Igor Grinberg
Signed-off-by: Nikita Kiryanov
Reviewed-by: Tom Rini -
We drop everything possible things from board headerfiles and replace
this functionality with responsible settings in Kconfig (_defconfig).Signed-off-by: Hannes Schmelzer
Reviewed-by: Tom Rini -
There is no need to have some specific prompt, so we drop this within
defconfigs.Signed-off-by: Hannes Schmelzer
Reviewed-by: Tom Rini -
This patch adds support for stm32f7 family & stm32f746 board.
Signed-off-by: Vikas Manocha
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As QSPI and IFC are pin-multiplexed on LS1021A, only IFC is supported
in SD boot now. For the customer's demand, QSPI needs to be supported
in SD boot too.This patch adds QSPI or IFC support in SD boot according to the
corresponding defconfig. For detail, ls1021aqds_sdcard_ifc_defconfig
is used to support IFC in SD boot and ls1021aqds_sdcard_qspi_defconfig
is used to support QSPI in SD boot.Signed-off-by: Alison Wang
Reviewed-by: York Sun -
Convert ls1021aqds_nor_lpuart and ls1021aqds_ddr4_nor_lpuart
to driver model suport. Enable lpuart port driver.Signed-off-by: York Sun
CC: Alison Wang
CC: Bin Meng
Reviewed-by: Bin Meng
Reviewed-by: Alison Wang
24 Feb, 2016
4 commits
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Add support for phy 1-3.
Signed-off-by: Jelle van der Waa
[hdegoede@redhat.com: use setclrbits_le32 instead of read-modify-write]
Signed-off-by: Hans de Goede -
SY8106A is a PMIC which is used on the Allwinner
H3 Orange Pi Pc and Plus board. The VOUT1_SEL register is
implemented to set the default V-CPU voltage to 1200 mV.This driver is required to ensure the SY8106A V-CPU
voltage is set to 1200 mV after a software reset. On cold
boot the default SY8106A output voltage is selected to be
1200 mV by a pair of resistors on the Orange Pi PC and Plus.Signed-off-by: Jelle van der Waa
Tested-by: Siarhei Siamashka
Acked-by: Siarhei Siamashka
Signed-off-by: Hans de Goede -
Split duart configuration as device tree file. Move /chosen node
out of board commone device tree. Convert ls1021aqds nor and SD
configurations to driver model support (qspi already uses DM).
Enable ns16550 DM serial driver for nor configurations.Signed-off-by: York Sun
CC: Alison Wang
CC: Bin Meng
Reviewed-by: Bin Meng
Reviewed-by: Alison Wang
23 Feb, 2016
2 commits
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enable dma driver model for am437x_sk_evm as ti-edma3 supports
driver modelSigned-off-by: Mugunthan V N
Reviewed-by: Simon Glass
Reviewed-by: Jagan Teki
22 Feb, 2016
1 commit
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Add Arasan SDHCI entry to Kconfig and fix all references.
Signed-off-by: Michal Simek
21 Feb, 2016
4 commits
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In current design, if any peripheral was assigned to both A7 and M4,
it will receive ipg_stop or ipg_wait when any of the 2 platforms
enter low power mode. We will have a risk that, if A7 enter wait,
M4 enter stop, peripheral will have chance to get ipg_stop and ipg_wait
asserted same time. Also if M4 enters stop mode, A7 will have no
chance to access the peripheral.
There are 26 peripherals affected by this IC issue:
SIM2(sim2/emvsim2)
SIM1(sim1/emvsim1)
UART1/UART2/UART3/UART4/UART5/UART6/UART7
SAI1/SAI2/SAI3
WDOG1/WDOG2/WDOG3/WDOG4
GPT1/GPT2/GPT3/GPT4
PWM1/PWM2/PWM3/PWM4
ENET1/ENET2
Software Workaround:
The solution is to set the peripherals to Domain0 by A core, since A core
in Domain0. The peripherals which will be used by M4, will be set to Domain1
by M4.
For example, A core set WDOG4 to domain0, but when M4 boots up, M4 will
set WDOG4 to domain1, because M4 will use WDOG4.So the peripherals are not shared by them. This way requires
the uboot implemented the RDC driver and set the 26 IPs above
to domain 0 only. M4 image will set the M4 to domain 1 and
set peripheral which it will use to domain 1.This patch enables the CONFIG_IMX_RDC and CONFIG_IMX_BOOTAUX for
i.MX7D SABRESD board, and setup the 26 IP resources to domain 0.Signed-off-by: Ye.Li
Signed-off-by: Peng Fan -
This adds basic support to Intel Cougar Canyon 2 board, a board
based on Chief River platform with an Ivy Bridge processor and
a Panther Point chipset.Signed-off-by: Bin Meng
Acked-by: Simon Glass