Eric Lee / smarc-uboot

20 May, 2019

6 commits

18 Sep, 2018

1 commit

07 May, 2018

1 commit

  • 83d290c56   SPDX: Convert all of our single license tags to Linux Kernel style ... Browse Code »
    56

    When U-Boot started using SPDX tags we were among the early adopters and
    there weren't a lot of other examples to borrow from. So we picked the
    area of the file that usually had a full license text and replaced it
    with an appropriate SPDX-License-Identifier: entry. Since then, the
    Linux Kernel has adopted SPDX tags and they place it as the very first
    line in a file (except where shebangs are used, then it's second line)
    and with slightly different comment styles than us.

    In part due to community overlap, in part due to better tag visibility
    and in part for other minor reasons, switch over to that style.

    This commit changes all instances where we have a single declared
    license in the tag as both the before and after are identical in tag
    contents. There's also a few places where I found we did not have a tag
    and have introduced one.

    Signed-off-by: Tom Rini

    Tom Rini
     

20 Jan, 2016

1 commit

24 Jul, 2013

1 commit

24 Oct, 2012

2 commits

  • a88731a6c   mpc83xx: add support for mpc8309 ... Browse Code »

    This processor, though very similar to other members of the
    PowerQUICC II Pro family (namely 8308, 8360 and 832x), provides
    yet another feature set than any supported sibling.

    Signed-off-by: Gerlando Falauto
    Signed-off-by: Kim Phillips

    Gerlando Falauto
     
  • 8afad91f1   cleanup: introduce CONFIG_MPC830x ... Browse Code »

    Introduce a new configuration token CONFIG_MPC830x to be shared among
    mpc8308 and mpc8309. Define it for existing 8308 boards, and refactor
    existing common code so to make future introduction of 8309 simpler.

    Signed-off-by: Gerlando Falauto
    Signed-off-by: Kim Phillips

    Gerlando Falauto
     

04 Nov, 2011

3 commits

07 Jul, 2011

1 commit

06 Feb, 2011

1 commit

24 Sep, 2010

2 commits

10 Jul, 2010

1 commit

  • 7c619ddce   mpc8308: support for Freescale MPC8308 cpu ... Browse Code »

    This patch adds basic support for Freescale MPC8308 CPU. Serial ports,
    NOR flash and integrated Ethernet controllers are supported.
    PCI Express is also supported. eSDHC, NAND and USB may work but aren't
    tested (using ULPI PHY requires additional patch).

    Signed-off-by: Ilya Yanok
    Signed-off-by: Kim Phillips

    Ilya Yanok
     

04 Jun, 2010

1 commit

  • f986325dd   Update SICRL_USBDR to reflect 4 different settings ... Browse Code »

    This patch changed the SICRL_USBDR define to reflect the 4 different bit
    settings for this two-bit field. The four different options are '00', '01',
    '10', and '11'. This patch also corrects the config file for SIMPC8313 and
    MPC8313ERDB for the appropriate fields. This change only affects the MPC8313
    cpu.

    Signed-off-by: Ron Madrid
    Signed-off-by: Kim Phillips

    Ron Madrid
     

22 Aug, 2009

1 commit

03 Jul, 2009

1 commit

13 Jun, 2009

1 commit

17 Feb, 2009

2 commits

22 Jan, 2009

2 commits

  • fd6646c0b   mpc83xx: Add support for MPC83xx PCI-E controllers ... Browse Code »

    This patch adds support for MPC83xx PCI-E controllers in Root Complex
    mode.

    The patch is based on Tony Li and Dave Liu work[1].

    Though unlike the original patch, by default we don't register PCI-E
    buses for use in U-Boot, we only configure the controllers for future
    use in other OSes (Linux). This is done because we don't have enough
    of spare BATs to map all the PCI-E regions.

    To actually use PCI-E in U-Boot, users should explicitly define
    CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES symbol in the board file. And
    only then U-Boot will able to access PCI-E, but at the cost of disabled
    address translation.

    [1] http://lists.denx.de/pipermail/u-boot/2008-January/027630.html

    Signed-off-by: Tony Li
    Signed-off-by: Anton Vorontsov
    Acked-by: Dave Liu
    Signed-off-by: Kim Phillips

    Anton Vorontsov
     
  • 75f35209f   83xx: PCI agent mode fixes for multi-board systems ... Browse Code »

    When running a system with 2 or more MPC8349EMDS boards in PCI agent mode,
    the boards will lock up the PCI bus by scanning against each other.

    The boards lock against each other by trying to access the PCI bus before
    clearing their configuration lock bit. Both boards end up in a loop,
    sending and receiving "Target Not Ready" messages forever.

    When running in PCI agent mode, the scanning now takes place after the
    boards have cleared their configuration lock bit.

    Also, add a missing declaration to the mpc83xx.h header file, fixing a
    build warning.

    Signed-off-by: Ira W. Snyder
    Signed-off-by: Kim Phillips

    Ira Snyder
     

20 Nov, 2008

1 commit

30 Oct, 2008

1 commit

  • 4e190b03a   Make Freescale local bus registers available for both 83xx and 85xx. ... Browse Code »

    - Rename lbus83xx_t to fsl_lbus_t and move it to asm/fsl_lbc.h so that it
    can be shared by both 83xx and 85xx
    - Remove lbus83xx_t and replace it with fsl_lbus_t in all 83xx boards
    files which use lbus83xx_t.
    - Move FMR, FIR, FCR, FPAR, LTESR from mpc83xx.h to asm/fsl_lbc.h so that
    85xx can share them.

    Signed-off-by: Jason Jin
    Signed-off-by: Haiying Wang
    Signed-off-by: Scott Wood

    Haiying Wang
     

22 Oct, 2008

1 commit

24 Sep, 2008

1 commit

26 Aug, 2008

1 commit

13 Aug, 2008

1 commit

  • e4c095085   NAND boot: MPC8313ERDB support ... Browse Code »

    Note that with older board revisions, NAND boot may only work after a
    power-on reset, and not after a warm reset. I don't have a newer board
    to test on; if you have a board with a 33MHz crystal, please let me know
    if it works after a warm reset.

    Signed-off-by: Scott Wood

    Scott Wood
     

15 Jul, 2008

1 commit

11 Jun, 2008

2 commits

29 Mar, 2008

1 commit

26 Mar, 2008

2 commits

  • d892b2dbb   mpc83xx: MPC8360E-RDK: rework ddr setup, enable ecc ... Browse Code »

    Current DDR setup easily causes memory corruption, this patch fixes it.

    Also fix TIMING_CFG0_MRS_CYC definition.

    Signed-off-by: Anton Vorontsov

    Anton Vorontsov
     
  • 5bbeea86e   mpc8323erdb: Improve the system performance ... Browse Code »

    The following changes are based on kernel UCC ethernet performance:

    1. Make the CSB bus pipeline depth as 4, and enable the repeat mode
    2. Optimize transactions between QE and CSB. Added CFG_SPCR_OPT
    switch to enable this setting.

    The following changes are based on the App Note AN3369 and
    verified to improve memory latency using LMbench:

    3. CS0_CONFIG[AP_n_EN] is changed from 1 to 0
    4. CS0_CONFIG[ODT_WR_CONFIG] set to 1. Was a reserved setting
    previously.
    5. TIMING_CFG_1[WRREC] is changed from 3clks to 2clks (based on
    Twr=15ns, and this was already the setting in DDR_MODE)
    6. TIMING_CFG_1[PRETOACT] is changed from 3clks to 2clks. (based on
    Trp=15ns)
    7. TIMING_CFG_1[ACTTOPRE] is changed from 9clks to 6clks. (based on
    Tras=40ns)
    8. TIMING_CFG_1[ACTTORW] is changed from 3clks to 2clks. (based on
    Trcd=15ns)
    9. TIMING_CFG_1[REFREC] changed from 21 clks to 11clks. (based on
    Trfc=75ns)
    10. TIMING_CFG_2[FOUR_ACT] is changed from 10 clks to 7clks. (based
    on Tfaw=50ns)
    11. TIMING_CFG_2[ADD_LAT] and DDR_MODE[AL] changed from 0 to 1 (based
    on CL=3 and WL=2).

    Signed-off-by: Michael Barkowski
    Acked-by: Kim Phillips

    Michael Barkowski