25 Apr, 2017
1 commit
-
Add support for the Terasic DE10-Nano board. The board
is based on the DE0-Nano-Soc board but adds a larger FPGA
and an HDMI output.Signed-off-by: Dalon Westergreen
Reviewed-by: Dinh Nguyen
06 Dec, 2016
2 commits
-
With the acquisition of Altera by Intel, my Altera email may be going
away soon. Update the contact to a more reliable address.Signed-off-by: Dinh Nguyen
-
Add CycloneV based Terasic DE1-SoC board. The board boots
from SD/MMC. Ethernet and USB host is supported.Signed-off-by: Anatolij Gustschin
Cc: Marek Vasut
27 Oct, 2016
2 commits
-
Adding new handoff for SDRAM ctrcfg.extratime1 which is
required for stable LPDDR2 operation. Since the board is
using DDR3, the handoff is set to default value 0.Signed-off-by: Chin Liang See
Cc: Marek Vasut
Cc: Dinh Nguyen -
Adding new handoff for SDRAM ctrcfg.extratime1 which is
required for stable LPDDR2 operation. Since the board is
using DDR3, the handoff is set to default value 0.Signed-off-by: Chin Liang See
Cc: Marek Vasut
Cc: Dinh Nguyen
10 Apr, 2016
1 commit
-
The currently present DRAM timings generated from GHRD 14.0 did
not work on SoCkit rev. D because they were too tight. Load the
DRAM timings from GHRD 13.0 which are more relaxed and work with
SoCkit rev. D.Signed-off-by: Marek Vasut
Cc: Dinh Nguyen
Cc: Chin Liang See
20 Dec, 2015
4 commits
-
Drop all the common board code, since it is not completely useless.
Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen -
This patch adds the necessary OF alias for the UDC node, which let's
the code locate the DWC2 UDC base address in OF instead of hard-coding
it into the U-Boot binary. The code is adjusted to use the address from
OF instead of the hard-coded one. Finally, the hard-coded address is
removed and USB DM support is enabled.Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Lukasz Majewski
Cc: Lukasz Majewski -
The Micrel PHY configuration is now done from OF, so hard-coding
the configuration into the board file is no longer necessary.Signed-off-by: Marek Vasut
Cc: Joe Hershberger
Cc: Chin Liang See
Cc: Dinh Nguyen -
The Micrel PHY configuration is now done from OF, so hard-coding
the configuration into the board file is no longer necessary.Signed-off-by: Marek Vasut
Cc: Joe Hershberger
Cc: Chin Liang See
Cc: Dinh Nguyen
18 Dec, 2015
3 commits
-
The driver is actually for the Designware DWC2 controller.
This patch renames the global s3c_udc.h header to dwc2_udc.h.The rename is done automatically:
$ sed -i "s/s3c_udc\.h/dwc2_udc.h/g" \
`git grep "s3c_udc\.h" | cut -d : -f 1`Signed-off-by: Marek Vasut
-
The driver is actually for the Designware DWC2 controller.
This patch is the second and final to rename global symbol,
the s3c_udc_probe() function.The rename is done automatically:
$ sed -i "s/s3c_udc_probe/dwc2_udc_probe/g" \
`git grep s3c_udc_probe | cut -d : -f 1`Signed-off-by: Marek Vasut
-
The driver is actually for the Designware DWC2 controller.
This patch is the first to rename global symbol, the struct
s3c_plat_otg_data.The rename is done automatically:
$ sed -i "s/s3c_plat_otg_data/dwc2_plat_otg_data/g" \
`git grep s3c_plat_otg_data | cut -d : -f 1`Signed-off-by: Marek Vasut
04 Sep, 2015
2 commits
-
Add support for the Terasic DE0-Nano/Atlas-SoC Kit, which is a CycloneV
based board. The board can boot from SD/MMC. Ethernet is also supported.Signed-off-by: Dinh Nguyen
-
Add support for Terasic SoCkit, which is CycloneV based board.
The board can boot either from SD/MMC or QSPI. Ethernet is also
supported.Signed-off-by: Marek Vasut
