20 Jul, 2016
1 commit
05 May, 2016
1 commit
26 Apr, 2016
2 commits
14 Jan, 2016
2 commits
08 Jan, 2016
1 commit
07 Jan, 2016
1 commit
14 Nov, 2015
1 commit
16 Sep, 2015
2 commits
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The WAKEUP_X pins are always an input no matter the pinmux mode.
However, the 18th bit that typical configures a pin as an input is
considered reserved for the WAKEUP_X pins. Therefore, for any WAKEUP
pin remove any configuration that sets that pin as an input. Since
those pins are only inputs remove any output configuration from those
pins.Signed-off-by: Franklin S Cooper Jr
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This reverts commit b5a8694cf6a0f2ac504e16e3068b967f3ecc8700.
This patch was incorrectly setting the 18th bit of the padconf register
which is reserved.
11 Sep, 2015
1 commit
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WAKEUP2 is used as a gpio input for the touch screen controller's interrupt
output signal. It was incorrect to set it as an output in the first place.This is valid for both the OSD panel that uses the EDT FT5506 touchscreen
controller and the LG panel that uses the LDC3001 touchscreen controller.Signed-off-by: Franklin S Cooper Jr
Signed-off-by: Dan Murphy
13 Aug, 2015
2 commits
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DP83865 ethernet phy used on DRA74x-evm is quirky and the datasheet
provided IODELAY values for standard RGMII phys do not work.Silicon Revision(SR) 2.0 provides an alternative bit configuration
that allows us to do a "gross adjustment" to launch the data off a
different internal clock edge. Manual IO Delay overrides are still
necessary to fine tune the clock-to-data delays. This is a necessary
workaround for the quirky ethernet Phy we have on the platform.NOTE: SMA registers are spare "kitchen sink" registers that does
contain bits for other workaround as necessary as well. Hence the
control for the same is introduced in a generic SoC specific, board
generic location.Signed-off-by: Nishanth Menon
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Silicon revision 2.0 has new signal routing hence has an updated set of
iodelay parameters to be used. Update the configuration for the same.
Padmux remains the same.Based on data from VayuES2_EVM_Base_Config-20150807.
NOTE: With respect to the RGMII values, the Manual IODelay values
are used for the fine adjusments needed to meet the tight RGMII
specification.Signed-off-by: Nishanth Menon
12 Aug, 2015
2 commits
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ARM supported speeds and init value of core_pll for SDP1200
are programmed wrong as part for the device speed cleanups.
Fixing it here.Signed-off-by: Lokesh Vutla
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On keystone2 Lamarr and Edison platforms, the PA clocksource
mux in PLL REG1, can be changed only after enabling its clock
domain.
So selecting the output of PASS PLL as input to PA only after
enabling the clockdomain.
This is as per the debug done by "Vitaly Andrianov "
and based on the previous work done by "Hao Zhang "Fixes: d634a0775bcf ("ARM: keystone2: Cleanup PLL init code")
Reported-by: Vitaly Andrianov
Tested-by: Vitaly Andrianov
Signed-off-by: Lokesh Vutla
07 Aug, 2015
6 commits
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Add a new config to support usb rndis boot for am43xx.
Signed-off-by: Kishon Vijay Abraham I
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Add in code to initialize the DWC3 gadget controller so that we can do
RNDIS in SPL on these platforms.Signed-off-by: Tom Rini
Signed-off-by: Kishon Vijay Abraham I -
vbus_id_status is initialized in board_usb_init. So remove it
while creating dwc3_device objects.Signed-off-by: Kishon Vijay Abraham I
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invoke enable_usb_clocks during board_usb_init and disable_usb_clocks
during board_usb_exit to enable and disable clocks respectively.Signed-off-by: Kishon Vijay Abraham I
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Implemented board_usb_init(), board_usb_cleanup() and
usb_gadget_handle_interrupts() in omap5 board file that
can be invoked by various gadget drivers.Signed-off-by: Kishon Vijay Abraham I
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Implemented board_usb_init(), board_usb_cleanup() and
usb_gadget_handle_interrupts() in beagle_x15 board file that
can be invoked by various gadget drivers.Signed-off-by: Kishon Vijay Abraham I
05 Aug, 2015
15 commits
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Add config file for k2g
Signed-off-by: Lokesh Vutla
Signed-off-by: Mugunthan V N
Signed-off-by: Vitaly Andrianov -
GPIO1_9 controls SPI flash on k2g evm.
So make GPIO1_9 as output pin, inorder to use SPI.Signed-off-by: Lokesh Vutla
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Add MMC support for k2g
Signed-off-by: Roger Quadros
Signed-off-by: Lokesh Vutla
Tested-by: Mugunthan V N -
Add Ethernet support for tftp support
Signed-off-by: Vitaly Andrianov
Signed-off-by: Mugunthan V N
Signed-off-by: Lokesh Vutla -
Phy mode is a board property and it can be different between
multiple board and ports, so it should not be hardcoded in
driver to one specific mode. So adding a field in eth_priv_t
structure to pass phy mode to driver.Signed-off-by: Mugunthan V N
Signed-off-by: Lokesh Vutla -
Add pin mux data for k2g-evm
Signed-off-by: Vitaly Andrianov
Signed-off-by: Lokesh Vutla -
Add ddr3 related info
Signed-off-by: Vitaly Andrianov
Signed-off-by: Lokesh Vutla -
Add clock information for Galileo
Signed-off-by: Vitaly Andrianov
Signed-off-by: Lokesh Vutla
Signed-off-by: Mugunthan V N -
Add pll data for k2g
Signed-off-by: Vitaly Andrianov
Signed-off-by: Lokesh Vutla -
Add Kconfig support
Signed-off-by: Lokesh Vutla
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Currently to flash u-boot image onto NAND or SPI NOR flash, very first
time user need to use Code Composer Studio (CCS). This is cumbersome for
an user not familiar with CCS. This patch add simpler procedure using
uart boot mode for K2 EVMs.When UART bootmode is set and board is rebooted, the ROM boot loader
transfers the image at the beginning of the internal RAM. After the
transfer is complete the boot-loader sets the PC to the first internal RAM
address 0x0c000000. The u-boot.bin is linked to the address 0x0c001000.In order to use the u-boot.bin as an image for UART download, we need to
add 4K zeros prefix that act as 1K NOP instructions before reaching
0xc001000.Signed-off-by: Vitaly Andrianov
Signed-off-by: Lokesh Vutla
Acked-by: Murali Karicheri
Tested-by: Murali Karicheri -
Remove unused external clocks and make a common definition
for all keystone platforms.Reviewed-by: Tom Rini
Signed-off-by: Lokesh Vutla -
This is just a cosmetic change that makes
the calling of pll init code looks much cleaner.Reviewed-by: Tom Rini
Reviewed-by: Vitaly Andrianov
Signed-off-by: Lokesh Vutla -
Use common devspeed and armspeed definitions.
Also fix reading efuse bootrom register.Reviewed-by: Tom Rini
Reviewed-by: Vitaly Andrianov
Signed-off-by: Lokesh Vutla -
There are two types of PLL for all keystone platforms:
Main PLL, Secondary PLL. Instead of duplicating the same definition
for each secondary PLL, have a common function which does
initialization for both PLLs. And also add proper register
definitions.Reviewed-by: Tom Rini
Signed-off-by: Lokesh Vutla
04 Aug, 2015
2 commits
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Kernel stores information to the RTC_SCRATCH0 and RTC_SCRATCH1 registers
for wakeup from RTC-only mode. Parse these registers during SPL boot and
jump to the kernel resume vector if the device is waking up from RTC-only
mode.The RTC scratch register layout used is:
SCRATCH0 : bits00-31 : kernel resume address
SCRATCH1 : bits00-15 : RTC magic value used to detect valid config
SCRATCH1 : bits16-31 : board type information populated by bootloaderDuring the normal boot patch the SCRATCH1 : bits16-31 are updated with
the eeprom read board type data. In the rtc_only boot path the rtc
scratchpad register is read and the board type is determined and
correspondingly ddr dpll parameters are set. This is done so as to avoid
costly i2c read to eeprom.RTC-only mode support is currently only enabled for
am43xx_evm_rtconly_config.
This is not to be used with epos evm builds.Signed-off-by: Tero Kristo
[j-keerthy@ti.com] Ported to latest branch with minor fixes
Signed-off-by: Keerthy
Signed-off-by: Lokesh Vutla -
KS2_RSTCTRL_RSTYPE is defined as KS2_PLL_CNTRL_BASE + offset.
But ddr driver reads KS2_PLL_CNTRL_BASE + KS2_RSTCTRL_RSTYPE
for detecting reset type, which gives a wrong reset type.
Fixing it by just reading KS2_RSTCTRL_RSTYPE.Reviewed-by: Vitaly Andrianov
Signed-off-by: Lokesh Vutla
30 Jul, 2015
1 commit
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Because KS2 u-boot works in 32 bit address space the existing ram_size
global data field cannot be used. The maximum, which the get_ram_size()
can detect is 2GB only. The ft_board_setup() needs the actual ddr3 size
to fix up dtb.This commit introduces the ddr3_get_size() which uses SPD data to
calculate the ddr3 size. This function replaces the "ddr3_size"
environment variable, which was used to get the SODIMM size.For platforms, which don't have SODIMM with SPD and ddr3 is populated to
a board a simple ddr3_get_size function that returns ddr3 size has to be
implemented. See hardware-k2l.hSigned-off-by: Vitaly Andrianov