23 May, 2014
4 commits
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This sub-command adds support for the RPMB partition of an eMMC:
* mmc rpmb key
Programs the authentication key in the eMMC This key can not
be overwritten.
* mmc rpmb read [address of key]
Reads blocks of 256 bytes in the RPMB partition
beginning at block number . If the optionnal
address of the authentication key is provided, the
Message Authentication Code (MAC) is verified on each
block.
* mmc rpmb write
Writes blocks of 256 bytes in the RPMB partition
beginning at block number . The datas are signed
with the key provided.
* mmc rpmb counter
Returns the 'Write counter' of the RPMB partition.The sub-command is conditional on compilation flag CONFIG_SUPPORT_EMMC_RPMB
Acked-by: Pantelis Antoniou
Signed-off-by: Pierre Aubert
CC: Wolfgang Denk
20 May, 2014
2 commits
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Added support to load partial bitstreams.
The partial bitstreams can be loaded using the below commands
Commands:
fpga loadp
fpga loadbp
The full bit streams can be loaded using the
old commands(fpga load and fpga loadb).Signed-off-by: Siva Durga Prasad Paladugu
Signed-off-by: Michal Simek -
Guard the LOADMK functionality with config to provide
an option to enable or disable it.
Enable it for all platforms in mainline which enable CONFIG_CMD_FPGA.Signed-off-by: Siva Durga Prasad Paladugu
Signed-off-by: Michal Simek
13 May, 2014
2 commits
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Some platforms (tested on mpc85xx, mpc86xx) use global data before calling
function baord_inti_f(). The data should not be cleared later. Any arch
which uses global data in generic board board_init_f() should define
CONFIG_SYS_GENERIC_GLOBAL_DATA.Signed-off-by: York Sun
CC: Scott Wood
CC: Simon Glass
CC: Albert ARIBAUD
Acked-by: Simon Glass -
keystone serial hw support hw flow control. This patch
enables hw flow control for keystone EVMs as an optional
feature based on CONFIG_SERIAL_HW_FLOW_CONTROL.Signed-off-by: Murali Karicheri
10 May, 2014
2 commits
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Now that sandbox has a good base of features, the README is quite out of
date. Update it, and document the new features.Signed-off-by: Simon Glass
09 May, 2014
1 commit
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Conflicts:
drivers/net/Makefile(trivial merge)
08 May, 2014
1 commit
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This patch contains an implementation of the fastboot protocol on the
device side and documentation. This is based on USB download gadget
infrastructure. The fastboot function implements the getvar, reboot,
download and reboot commands. What is missing is the flash handling i.e.
writting the image to media.v3 (Rob Herring):
This is based on http://patchwork.ozlabs.org/patch/126798/ with the
following changes:
- Rebase to current mainline and updates for current gadget API
- Use SPDX identifiers for licenses
- Traced the history and added missing copyright to cmd_fastboot.c
- Use load_addr/load_size for transfer buffer
- Allow vendor strings to be optional
- Set vendor/product ID from config defines
- Allow Ctrl-C to exit fastboot mode
v4:
- Major re-write to use the USB download gadget. Consolidated function
code to a single file.
- Moved globals into single struct.
- Use puts and putc as appropriate.
- Added CONFIG_USB_FASTBOOT_BUF_ADDR and CONFIG_USB_FASTBOOT_BUF_SIZE to
set the fastboot transfer buffer.
v5:
- Add CONFIG option documentation to README
- Rebase using new downloader registrationSigned-off-by: Sebastian Andrzej Siewior
Signed-off-by: Rob Herring
05 May, 2014
1 commit
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Former usb_cable_connected() patch broke compilation of boards which do
not support this feature.I've renamed usb_cable_connected() to g_dnl_usb_cable_connected() and added
its default implementation to gadget downloader driver code. There's
only one driver of this kind and it's unlikely there'll be another, so
there's no point in keeping it in /common.Previously this function was declared in usb.h. I've moved it, since
it's more appropriate to keep it in g_dnl.h - usb.h seems to be intended
for USB host implementation.Existing code, confronted with default -EOPNOTSUPP return value,
continues as if the cable was connected.CONFIG_USB_CABLE_CHECK was removed.
Change-Id: Ib9198621adee2811b391c64512f14646cefd0369
Signed-off-by: Mateusz Zalega
Acked-by: Marek Vasut
Acked-by: Lukasz Majewski
26 Apr, 2014
1 commit
23 Apr, 2014
6 commits
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Objective of this target to have concatenate binary having
- SPL binary in PBL command format
- U-boot binarySigned-off-by: Prabhakar Kushwaha
Reviewed-by: York Sun -
Current SPL code base has BSS section placed after reset_vector. This means
they have to relocate to use the global variables. This put an implicit
requirement of having SPL size = Memory/2.To avoid relocation:
- Move bss_section within SPL range
- Modify relocate_code()Signed-off-by: Prabhakar Kushwaha
Reviewed-by: York Sun -
When T104x soc wakes up from deep sleep, control is passed to the
primary core that starts executing uboot. After re-initialized some
IP blocks, like DDRC, kernel will take responsibility to continue
to restore environment it leaves before.Signed-off-by: Tang Yuantian
Reviewed-by: York Sun -
Mostly reusing DDR3 driver, this patch adds DDR4 SPD handling, register
calculation and programming.Signed-off-by: York Sun
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CONFIG_SYS_QE_FMAN_FW_ADDR is used to both Fman and QE for microcode address.
Now using CONFIG_SYS_FMAN_FW_ADDR for Fman microcode address,
and CONFIG_SYS_QE_FW_ADDR for QE microcode address.Signed-off-by: Zhao Qiang
Reviewed-by: York Sun -
Changes:
1. L2 cache is being invalidated by Boot ROM code for e6500 core.
So removing the invalidation from start.S
2. Clear the LAW and corresponding configuration for CPC. Boot ROM
code uses it as hosekeeping area.
3. For Secure boot, CPC is configured as SRAM and used as house
keeping area. This configuration is to be disabled once in uboot.
Earlier this disabling of CPC as SRAM was happening in cpu_init_r.
As a result cache invalidation function was getting skipped in
case CPC is configured as SRAM.This was causing random crashes.Signed-off-by: Ruchika Gupta
Signed-off-by: Aneesh Bansal
Reviewed-by: York Sun
20 Apr, 2014
2 commits
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Signed-off-by: Masahiro Yamada
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Commit 54e458de deleted qi_lb60 board support
because of the incompatible license issue.There is no board with XBurst CPU.
Signed-off-by: Masahiro Yamada
Cc: Daniel Schwierzeck
18 Apr, 2014
4 commits
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This patch introduces a configurable mechanism to disable
subpage writes in the DaVinci NAND driver.Signed-off-by: Vitaly Andrianov
Signed-off-by: Murali Karicheri
Acked-by: Tom Rini -
Signed-off-by: Tom Rini
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This mainly converts the am335x_spl_bch driver to the "normal" format
which means a slight change to nand_info within the driver.Acked-by: Scott Wood
Signed-off-by: Tom Rini
08 Apr, 2014
3 commits
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Conflicts:
arch/arm/cpu/arm926ejs/mxs/Makefile
include/configs/trats.h
include/configs/trats2.h
include/mmc.h -
Full cache line writes to the same memory region from at least two
processors might deadlock the processor. Exists on r1, r2, r3
revisions.Signed-off-by: Nitin Garg
Acked-by: Fabio Estevam -
A short loop including a DMB instruction might cause a denial of
service on another processor which executes a CP15 broadcast operation.
Exists on r1, r2, r3, r4 revisions.Signed-off-by: Nitin Garg
Acked-by: Dirk Behme
03 Apr, 2014
1 commit
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Those commands basis on implementation of random UUID generator version 4
which is described in RFC4122. The same algorithm is used for generation
both ids but string representation is different as below.char: 0 9 14 19 24 36
xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx
UUID: be be be be be
GUID: le le le be beCommands usage:
- uuid []
- guid []The result is saved in environment as a "varname" variable if argument is given,
if not then it is printed.New config:
- CONFIG_CMD_UUIDSigned-off-by: Przemyslaw Marczak
Cc: Stephen Warren
Cc: Lukasz Majewski
Cc: trini@ti.com
23 Mar, 2014
1 commit
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on nand flash using ubi, after the download of the new image into
the flash, the "rest" of the nand sectors get erased while flushing
the medium. With current u-boot version dfu-util may show:Starting download: [##################################################] finished!
state(7) = dfuMANIFEST, status(0) = No error condition is present
unable to read DFU statusas get_status is not answered while erasing sectors, if erasing
needs some time.So do the following changes to prevent this:
- introduce dfuManifest state
According to dfu specification
( http://www.usb.org/developers/devclass_docs/usbdfu10.pdf ) section 7:
"the device enters the dfuMANIFEST-SYNC state and awaits the solicitation
of the status report by the host. Upon receipt of the anticipated
DFU_GETSTATUS, the device enters the dfuMANIFEST state, where it
completes its reprogramming operations."- when stepping into dfuManifest state, sending a PollTimeout
DFU_MANIFEST_POLL_TIMEOUT in ms, to the host, so the host
(dfu-util) waits the PollTimeout before sending a get_status again.Signed-off-by: Heiko Schocher
Cc: Lukasz Majewski
Cc: Kyungmin Park
Cc: Marek Vasut
Cc: Pantelis Antoniou
22 Mar, 2014
1 commit
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Add simple 'aes' command, which allows using the AES-128-CBC encryption
and decryption functions from U-Boot command line.Signed-off-by: Marek Vasut
05 Mar, 2014
1 commit
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Add 64-bit data for memory commands, such as md, mw, mm, cmp. The new
size ".q " is introduced.For 64-bit architecture, 64-bit data is enabled by default, by detecting
compiler __LP64__. It is optional for other architectures.Signed-off-by: York Sun
27 Feb, 2014
3 commits
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Conflicts:
arch/arm/cpu/armv7/config.mk
board/ti/am43xx/mux.c
include/configs/am43xx_evm.hSigned-off-by: Tom Rini
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When we tell the compiler to optimize for ARMv7 (and ARMv6 for that
matter) it assumes a default of SCTRL.A being cleared and unaligned
accesses being allowed and fast at the hardware level. We set this bit
and must pass along -mno-unaligned-access so that the compiler will
still breakdown accesses and not trigger a data abort.To better help understand the requirements of the project with respect
to unaligned memory access, the
Documentation/unaligned-memory-access.txt file has been added as
doc/README.unaligned-memory-access.txt and is taken from the v3.14-rc1
tag of the kernel.Cc: Albert ARIBAUD
Cc: Mans Rullgard
Signed-off-by: Tom Rini -
Remove the last uses of symbol offsets in ARM U-Boot.
Remove some needless uses of _TEXT_BASE.
Remove all _TEXT_BASE definitions.Signed-off-by: Albert ARIBAUD
22 Feb, 2014
3 commits
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Freescale LayerScape SoCs support controller interleaving on 256 byte size.
This interleaving is mandoratory.Signed-off-by: York Sun
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DDR base address has been the same from the view of core and DDR
controllers. This has changed for Freescale ARM-based SoCs. Controllers
setup DDR memory in a contiguous space and cores view it at separated
locations.Signed-off-by: York Sun
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Initially it was believed the DDR controller on Freescale ARM would have
big endian. But some platform will have little endian.Signed-off-by: York Sun
21 Feb, 2014
1 commit
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We have an unused FAT implementation in fs/fdos, remove.
Signed-off-by: Tom Rini