11 Oct, 2014
13 commits
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The SoCDK uses EMAC1, not EMAC0. This patch fixes the issue.
Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Albert Aribaud
Cc: Tom Rini
Cc: Wolfgang Denk
Cc: Pavel Machek -
Add MAINTAINERS entry.
Signed-off-by: Pavel Machek
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Albert Aribaud
Cc: Tom Rini
Cc: Wolfgang Denk
Cc: Pavel Machek -
Commit 832472 "tools: socfpga: Add socfpga preloader signing
to mkimage" added tools/socfpga.c which relies on htole32,
le32toh and friends. While compiler.h includes these protypes
for linux from endian.h, it doesn't do so for FreeBSD. Hence
include for FreeBSD.Cc: Marek Vasut
CC: Tom Rini
Signed-off-by: Jeroen Hofstee -
Signed-off-by: Heiko Schocher
Cc: Andreas Bießmann
Cc: Bo Shen
Signed-off-by: Andreas Bießmann -
Signed-off-by: Bo Shen
Signed-off-by: Andreas Bießmann -
Signed-off-by: Andreas Bießmann
Cc: Bo Shen -
Signed-off-by: Andreas Bießmann
Cc: Joe Hershberger
Cc: Bo Shen -
Signed-off-by: Hans de Goede
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Update readme file for Keystone II EVM boards to actual sources.
Also correct some typos. For now the Edison evaluation board is
added, README for K2E is mostly the same, so update README to
contain information also for K2E evm. Rename file to README as
it contains information for all keystone evm boards.Signed-off-by: Ivan Khoronzhuk
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The K2HK and K2E boards support SPL by default, so add
CONFIG_SPL option. Also export CONFIG_ARM, CONFIG_ARCH_KEYSTONE
and TARGET_K2*_EVM options to spl/.config as they are the same.
So now it's convinient to build gph images using only two commands:make k2hk_evm_defconfig
make u-boot-spi.gphAcked-By: Murali Karicheri
Signed-off-by: Murali Karicheri
Signed-off-by: Ivan Khoronzhuk
10 Oct, 2014
27 commits
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We need to set the 'BE' flag here for things to work right.
Signed-off-by: Tom Rini
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Since on powerpc phys_size_t can be unsigned long long, this printout
line can result in a not nice compile warning.Signed-off-by: Valentin Longchamp
Acked-by: Simon Glass -
The lines COL (collision detect) and CRS (carrier sense) needs to be connected
and muxed to the CPSW MAC for a proper function in half-duplex Mode of the
interface.Signed-off-by: Hannes Petermaier
Cc: Tom Rini -
Fix the spelling of "configs".
Signed-off-by: York Sun
CC: Masahiro Yamada
Acked-by: Masahiro Yamada -
A SPL/TPL enabled target would was not recognized as
such by BSD sed, since it relies on a GNU extension.
Instead of or-ing just spell out both matches.Cc: Masahiro Yamada
Signed-off-by: Jeroen Hofstee
Acked-by: Masahiro Yamada -
remove the seldomly used EXT2 support because the U-Boot binary will
not fit into the 512KiB flash otherwise.Signed-off-by: David Müller
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fix broken SPI access by adding/activating BOARD_EARLY_INIT_F
functionality and calling spi_init_f() from there.Signed-off-by: David Müller
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Signed-off-by: David Müller
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Signed-off-by: David Müller
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Signed-off-by: David Müller
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Signed-off-by: David Müller
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A number of network related files were imported from the LiMon
project; these contain a somewhat unclear license statement:Copyright 1994 - 2000 Neil Russell.
(See License)I analyzed the source code of LiMon v1.4.2 which was used for this
import. It does not contain any "License" file, but the top level
directory contains a file "COPYING", which turns out to be GPL v2
of June 1991. So it is legitimate to conclude that the LiMon derived
files are also to be released under GPLv2. Mark them as such.Signed-off-by: Wolfgang Denk
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Fix typo of commit d4e53f063dd25e071444b87303573e7440deeb89.
i2c2 pullup resisters are controlled by bit 0 of CONTROL_PROG_IO1.
It's value after reset is 0x00100001.In order to clear bit 0, original code write 0xfffffffe to
CONTROL_PROG_IO1 and toggle almost all default values.Original code affect following:
* disable i2c1 pullup resisters
* increase far end load setting for many modules
* setup invalid SC/LB combinationSigned-off-by: Alexander Kochetkov
CC: Tom Rini
CC: Steve Kipisz -
These boards have been orphaned for more than 6 months.
Signed-off-by: Masahiro Yamada
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These boards have been orphaned for more than 6 months.
Signed-off-by: Masahiro Yamada
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This board has been orphaned for more than 6 months.
It is the last board defining CONFIG_APM821XX.
The code inside #ifdef CONFIG_APM821XX should be removed too.Signed-off-by: Masahiro Yamada
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This board has been orphaned for more than 6 months.
Signed-off-by: Masahiro Yamada
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These boards have been orphaned for more than 6 months.
Signed-off-by: Masahiro Yamada
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In some cases, the last lines of SPL or TPL are not output to a file.
The entries remaining in the "unmatched" variable must be flushed.Signed-off-by: Masahiro Yamada
Acked-by: Simon Glass -
The definitions for div ratio supposed to be in hex and were added
in dec by mistake.Signed-off-by: Ivan Khoronzhuk
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At least on OMAP, init_sata() no longer performs scsi_scan()
so we must do it explicitly here.Cc: Dan Murphy
Signed-off-by: Roger Quadros -
scsi_scan() must be called as part of scsi_init() and not
as part of sata_init().Signed-off-by: Roger Quadros
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On OMAP platforms, SATA controller provides the SCSI subsystem
so implement scsi_init().Get rid of the unnecessary sata_init() call from dra7xx-evm
and omap5-uevm board files.Signed-off-by: Roger Quadros
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The DMA/FIS buffers are set in ahci_port_start() which is called
after ahci_host_init(). So don't start the DMA engine here
(i.e. don't set FIS_RX)This fixes the following error at kernel boot on OMAP platforms (e.g. DRA7x)
WARNING: CPU: 0 PID: 0 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x260/0x358()
44000000.ocp:L3 Custom Error: MASTER SATA TARGET GPMC (Idle): Data Access in User mode during Functional accessSigned-off-by: Roger Quadros
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Commit 12cc54376768461533b55ada1b0b6d4979f40579 'omap3: overo: Select
fdtfile for expansion board' wrongly missed the operator in the fdtfile
test. Update the test to only overwrite an empty fdtfile environment
variable.Signed-off-by: Stefan Herbrechtsmeier
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Commit 294b91a5817147d4b7f47be2ac69bac2a1f26491 moved initr_malloc
earlier than initr_unlock_ram_in_cache. This causes issue on T4240.
It may be related to locked L1 d-cache and unlocked L2 cache. D-
cache could and should be unlock earlier for normal operation.This patch moves initr_unlock_ram_in_cache before initr_malloc. It
has been verified on the following boards, in which only T4240QDS
suffered and has been since fixed: T4240QDS, T2080QDS, P5040DS,
P4080DS, MPC8572DS, MPC8536DS, MPC8641HPCN, B4860QDS.Signed-off-by: York Sun
CC: Scott Wood
CC: Simon Glass
Acked-by: Simon Glass
