05 Mar, 2015
1 commit
10 Jan, 2015
1 commit
08 Apr, 2014
1 commit
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Conflicts:
arch/arm/cpu/arm926ejs/mxs/Makefile
include/configs/trats.h
include/configs/trats2.h
include/mmc.h
02 Apr, 2014
6 commits
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1. The Data timeout counter value in eSDHC_SYSCTL register is
not working as it should be, so add quirks to enable this
workaround to fix it to the max value 0xE.2. Add CONFIG_SYS_FSL_ERRATUM_ESDHC111 to enable its workaround.
* Update of patch for change mmc interface by
Pantelis AntoniouSigned-off-by: Haijun Zhang
Acked-by: Pantelis Antoniou -
The controller reset is performed now if command error occurs.
This commit adds the reset for the case of data related errors too.Signed-off-by: Andrew Gabbasov
Acked-by: Pantelis Antoniou -
Calculation of the timeout value should be based on actual clock value,
written to controller registers. Since mmc->tran_speed is either the
maximum allowed speed, or the preliminary value, that is be not yet
set to registers, the actual timeout, taken by the controller, based
on its clock settings, may be much longer than expected, based on
mmc->tran_speed value. In particular it happens at early initialization
stage, when typical value of mmc->tran_speed is 20MHz or 26MHz, while
actual clock setting, configured in the controller, is 400kHz.
It's more correct to use mmc->clock value for timeout calculation instead.Signed-off-by: Andrew Gabbasov
Acked-by: Pantelis Antoniou -
Some eMMC chips may need the RST_n_FUNCTION bit set to a non-zero value
in order for warm reset of the system to work. Details on this being
required will be part of the eMMC datasheet. Also add using this
command to the dra7xx README.* Whitespace fix by panto
Signed-off-by: Tom Rini
Acked-by: Pantelis Antoniou -
Signed-off-by: Nobuhiro Iwamatsu
Reported-by: Masahiro Yamada
Acked-by: Pantelis Antoniou -
BY commit "mmc: Split mmc struct, rework mmc initialization (v2)",
sh_mmcif has compile error. This fixes compile error.Signed-off-by: Nobuhiro Iwamatsu
CC: Pantelis Antoniou
Reported-by: Masahiro Yamada
Acked-by: Pantelis Antoniou
29 Mar, 2014
1 commit
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In the recent mmc cleanup, the mmc_host_is_spi macro was broken and
bfin_sdh.c had mmc->bus_width turned into mmc_bus_width(mmc), both of
which were incorrect.Signed-off-by: Tom Rini
24 Mar, 2014
3 commits
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The way that struct mmc was implemented was a bit of a mess;
configuration and internal state all jumbled up in a single structure.On top of that the way initialization is done with mmc_register leads
to a lot of duplicated code in drivers.Typically the initialization got something like this in every driver.
struct mmc *mmc = malloc(sizeof(struct mmc));
memset(mmc, 0, sizeof(struct mmc);
/* fill in fields of mmc struct */
/* store private data pointer */
mmc_register(mmc);By using the new mmc_create call one just passes an mmc config struct
and an optional private data pointer like this:struct mmc = mmc_create(&cfg, priv);
All in tree drivers have been updated to the new form, and expect
mmc_register to go away before long.Changes since v1:
* Use calloc instead of manually calling memset.
* Mark mmc_register as deprecated.Signed-off-by: Pantelis Antoniou
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Using an array is pointless; even more pointless (and scary) is using
sprintf to fill it without a format string.Signed-off-by: Pantelis Antoniou
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Remove the in-structure ops and put them in mmc_ops with
a constant pointer to it.This makes the mmc structure smaller as well as conserving
code space (in theory).All in-tree drivers are converted as well; this is done in a
single patch in order to not break git bisect.Changes since V1:
Fix compilation b0rked issue on omap platforms where OMAP_GPIO was
not set.Signed-off-by: Pantelis Antoniou
12 Mar, 2014
1 commit
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This patch enables support for device tree for sdhci driver.
Non DT case is still supported.Signed-off-by: Piotr Wilczek
Signed-off-by: Kyungmin Park
Signed-off-by: Minkyu Kang
04 Mar, 2014
1 commit
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Enable initialize sdhci from DTB.
Signed-off-by: Michal Simek
27 Feb, 2014
1 commit
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Conflicts:
arch/arm/cpu/armv7/config.mk
board/ti/am43xx/mux.c
include/configs/am43xx_evm.hSigned-off-by: Tom Rini
23 Feb, 2014
1 commit
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Add support for the Kona SDHCI found on Broadcom mobile SoCs.
Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
Reviewed-by: Tim Kryger
21 Feb, 2014
1 commit
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With d6a320d we moved some clock externs out of blackfin_local.h and
into clock.h but now need to include in more drivers to
avoid warnings.Cc: Sonic Zhang
Signed-off-by: Tom Rini
18 Feb, 2014
1 commit
08 Feb, 2014
3 commits
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The open and close mmc sub-commands implement a hard-coded set of values
specific to the SMDK5250 platform. Remove these commands as what they
did can be done instead with a series of mmc dev / bootpart / bootbus
commands instead now.Cc: Amar
Cc: Minkyu Kang
Acked-by: Jaehoon Chung
Signed-off-by: Tom Rini
Signed-off-by: Pantelis Antoniou -
Add a bootbus sub-command to the mmc command to allow for setting
the boot_bus_width, reset_boot_bus_width and boot_mode fields of
BOOT_BUS_WIDTH (EXT_CSD[177]).Acked-by: Jaehoon Chung
Signed-off-by: Tom Rini
Signed-off-by: Pantelis Antoniou -
Add a partconf sub-command to the mmc command to allow for setting
the boot_ack, boot_partition and partition_access fields of
PARTITION_CONFIG (formerly BOOT_CONFIG, EXT_CSD[179]). Part of this
requires changing the check for 'part' from an strncmp to a strcmp, like
the rest of the sub-commands.Cc: Andy Fleming
Cc: Pantelis Antoniou
Acked-by: Jaehoon Chung
Signed-off-by: Tom Rini
Signed-off-by: Pantelis Antoniou
07 Feb, 2014
3 commits
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As per the below commit
"mmc: sdhci: add the quirk for broken r1b response"
(sha1: 3a6383207be3f71b39004e64464a6e99290b16fa)
need to add quirk SDHCI_QUIRK_BROKEN_R1B, when the
response type is R1b.Signed-off-by: Siva Durga Prasad Paladugu
Signed-off-by: Michal Simek
Acked-by: Jagannadha Sutradharudu Teki
Signed-off-by: Pantelis Antoniou -
This patch corrects the divider value written to CLKDIV register.
Since SDCLKIN is divided inside controller by the DIVRATIO value set
in the CLKSEL register, we need to use the same output clock value to
calculate the CLKDIV value.
as per user manual: cclk_in = SDCLKIN / (DIVRATIO + 1)Input parameter to mmc_clk is changed to dwmci_host, since
we need the same to read DWMCI_CLKSEL register.This improves the read timing values for channel 0 on SMDK5250
from 0.288sec to 0.144secSigned-off-by: Rajeshwari S Shinde
Acked-by: Jaehoon Chung
Signed-off-by: Pantelis Antoniou -
U-Boot currently sets MMC cards' RCA register to 0. This value is
reserved according to the specification. Use a value of 1 instead, just
like the Linux kernel.Signed-off-by: Stephen Warren
Acked-by: Jaehoon Chung
Signed-off-by: Pantelis Antoniou
04 Feb, 2014
1 commit
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Tegra124's MMC controller is very similar to earlier SoC generations,
and can be supported by the same driver.However, there are some non-backwards-compatible HW differences, and
hence a new DT compatible value must be used to describe the HW. This
patch updates the driver to support that new compatible value.That said, the HW differences are only relevant when enabling certain
high-performance transfer modes. Since the driver is currently very
simple and doesn't enable those modes, we don't actually need to address
any of these HW differences in the code yet, hence the simple nature of
this patch.Signed-off-by: Stephen Warren
Acked-by: Pantelis Antoniou
Tested-by: Thierry Reding
Acked-by: Simon Glass
Signed-off-by: Tom Warren
25 Jan, 2014
1 commit
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Signed-off-by: Masahiro Yamada
23 Jan, 2014
2 commits
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The upper 4 data signals of esdhc are shared with spi flash.
So detect if the upper 4 pins are assigned to esdhc before
enable sdhc 8 bit width.Signed-off-by: Haijun Zhang
Acked-by: Pantelis Antoniou
Reviewed-by: York Sun -
Card detection pin is ineffective on T4240QDS Rev1.0.
There are two cards can be connected to board.
1. eMMC card is built-in board, can not be removed. so
For eMMC card it is always there.
2. Card detecting pin is functional for SDHC card in Rev2.0.This workaround force sdhc driver scan and initialize the card
regardless of whether the card is inserted or not in case Rev1.0.Signed-off-by: Haijun Zhang
Acked-by: Pantelis Antoniou
Reviewed-by: York Sun
14 Jan, 2014
1 commit
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Don't know why but, file permission was changed
Signed-off-by: Minkyu Kang
09 Jan, 2014
5 commits
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To add the DesignWare MMC driver support for Altera SOCFPGA. It
required information such as clocks and bus width from platform
specific files (SOCFPGA handoff files)Signed-off-by: Chin Liang See
Cc: Rajeshwari Shinde
Cc: Jaehoon Chung
Cc: Pantelis Antoniou
Cc: Wolfgang Denk
Acked-by: Pantelis Antoniou -
The eMMC and the SD-Card specifications describe the optional SET_DSR command.
During measurements at our lab we found that some cards implementing this feature
having really strong driver strengts per default. This can lead to voltage peaks
above the specification of the host on signal edges for data sent from a card to
the host.Since availability of a given card type may be shorter than the time a certain
hardware will be produced it is useful to have support for this command (Alternative
would be changing termination resistors and adapting the driver strength of the
host to the used card.)Following proposal for an implementation:
- new field that reflects CSD field DSR_IMP in struct mmc
- new field for design specific DSR value in struct mmc
- board code can set DSR value in mmc struct just after registering an controller
- mmc_startup sends the the stored DSR value before selecting a card, if DSR_IMP is setAdditionally the mmc command is extended to make is possible to play around with different
DSR values.The concept was tested on a i.MX53 based platform using a Micron eMMC card where the default
DSR is 0x0400 (12mA) but in our design 0x0100 (0x0100) were enough. To use this feature for
instance on a mx53loco one have to add a call to mmc_set_dsr() in board_mmc_init() after
calling fsl_esdhc_initialize() for the eMMC.Signed-off-by: Markus Niebel
Acked-by: Pantelis Antoniou -
Fixup prints to show where the print is done from, and
a few minor formatting/grammar issues.Signed-off-by: Darwin Rambo
Acked-by: Pantelis Antoniou -
Bounce buffer implementation takes care of proper data buffer alignemt
and correct flush/invalidation of data cache at once so we no longer
depend on input data variety and make sure CPU and MMC controller deal
with expected data in case of enabled data cache.Bounce buffer requires to add its definition (CONFIG_BOUNCE_BUFFER) in
board configuration, otherwise corresponding library won't be compiled
and linker will fail to build resulting executable.Difference since v1 - fixed compile-time warning with type casting to
"void *":Slight edit to remove UTF8 characters in the commit message.
Acked-by: Jaehoon Chung
Tested-by: Jaehoon Chung
Acked-by: Pantelis Antoniou====
passing argument 2 of 'bounce_buffer_start' discards 'const' qualifier
from pointer target type
====Signed-off-by: Alexey Brodkin
Cc: Mischa Jonker
Cc: Alim Akhtar
Cc: Rajeshwari Shinde
Cc: Jaehoon Chung
Cc: Amar
Cc: Kyungmin Park
Cc: Minkyu Kang
Cc: Simon Glass
Cc: Pantelis Antoniou
Cc: Andy Fleming -
To enhance the SDMMC DesignWare driver to use calloc instead of
malloc. This will avoid the incident that uninitialized members
of mmc structure are later used for NULL comparison.Signed-off-by: Chin Liang See
Cc: Rajeshwari Shinde
Cc: Jaehoon Chung
Cc: Mischa Jonker
Cc: Alexey Brodkin
Cc: Andy Fleming
Cc: Pantelis Antoniou
Acked-by: Pantelis Antoniou
08 Dec, 2013
4 commits
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Faraday FTSDC021 is a controller which is compliant with
SDHCI v3.0, SDIO v2.0 and MMC v4.3.However this driver is only verified with SD memory cards.
Signed-off-by: Kuo-Jung Su
Acked-by: Pantelis Antoniou
CC: Andy Fleming -
Existing eSDHC SPL framework assumes booting from sd-image
with boot_format header which contains final u-boot Image
offset and size. No such header is present in case of
corenet devices like T1040 as corenet deivces use PBI-RCW
based intialization.So, for corenet deives, SPL bootloader use values provided
at compilation time. These values can be defined in board
specific config file.Signed-off-by: Priyanka Jain
Acked-by: Pantelis Antoniou -
If platform provides "host->fifoth_val" it will be used for
initialization of DWMCI_FIFOTH register. Otherwise default value will be
used.This implementation allows:
* escape unclear and recursive calculations that are currently in use
* use whatever custom value for DWMCI_FIFOTH initialization if any
particular SoC requires itSigned-off-by: Alexey Brodkin
Cc: Mischa Jonker
Cc: Alim Akhtar
Cc: Rajeshwari Shinde
Cc: Jaehoon Chung
Cc: Amar
Cc: Kyungmin Park
Cc: Minkyu Kang
Cc: Simon Glass
Cc: Pantelis Antoniou
Cc: Andy Fleming
Acked-by: Jaehoon Chung
Acked-by: Pantelis Antoniou -
dw-mmc.c is the general driver file.
So, remove the exynos specific code at dw-mmc.c.
Instead, exynos specific cod can be move into exynos-dw_mmc.c.Signed-off-by: Jaehoon Chung
Acked-by: Alexey Brodkin
Acked-by: Pantelis Antoniou
Acked-by: Minkyu Kang
01 Nov, 2013
1 commit
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Signed-off-by: Masahiro Yamada