24 Nov, 2014
3 commits
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Add reset_sata() to the sata driver interface and implement it
for dwc_ahsata. This function cleans up after sata_init(), and
therefore accepts a device number like sata_init() does.
A dummy implementation is provided for the rest of the drivers.Signed-off-by: Nikita Kiryanov
Cc: Simon Glass
Cc: Stefano Babic -
Implement disable_sata_clock for mx6 SoCs.
Signed-off-by: Nikita Kiryanov
Cc: Stefano Babic -
gw_ventana can boot from SPI or NAND and both of these interfaces boot from
the same 0x400 offset.This means that we could simplify the code and replace the custom gw_ventana.cfg
with the generic spl_sd.cfg, as it provides the same boot offset of 0x400.Cc: Tim Harvey
Signed-off-by: Fabio Estevam
21 Nov, 2014
10 commits
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When an invalid USDHC port is passed we should return -EINVAL instead of 0.
Also, return the error immediately on fsl_esdhc_initialize() failure.
Signed-off-by: Fabio Estevam
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When an invalid USDHC port is passed we should return -EINVAL instead of 0.
Also, return the error immediately on fsl_esdhc_initialize() failure.
Signed-off-by: Fabio Estevam
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When an invalid USDHC port is passed we should return -EINVAL instead of 0.
Also, return the error immediately on fsl_esdhc_initialize() failure.
Signed-off-by: Fabio Estevam
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When an invalid USDHC port is passed we should return -EINVAL instead of 0.
Also, return the error immediately on fsl_esdhc_initialize() failure.
Signed-off-by: Fabio Estevam
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When an invalid USDHC port is passed we should return -EINVAL instead of 0.
Also, return the error immediately on fsl_esdhc_initialize() failure.
Signed-off-by: Fabio Estevam
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Enable i.MX thermal DM driver to mx6sabre_common.h file. Since the
thermal is used in init_sequence_f, so define the CONFIG_SYS_MALLOC_F_LEN
to support DM driver using in pre relocation phase.Additional, thermal driver depends on ocotp, make sure to enable
CONFIG_MXC_OCOTP when CONFIG_IMX6_THERMAL is selected.Signed-off-by: Ye.Li
Signed-off-by: Nitin Garg -
Add imx6 thermal device to mx6 soc file. Read the cpu temperature
using this device to access onchip thermal sensor.Signed-off-by: Ye.Li
Signed-off-by: Nitin Garg -
Add a new thermal uclass for thermal sensor and implement the imx
thermal driver basing on this uclass.Signed-off-by: Ye.Li
Acked-by: Stefano Babic -
Add api to check and enable pll3 as required
for thermal sensor driver.Signed-off-by: Ye.Li
Signed-off-by: Nitin Garg -
When an invalid USDHC port is passed we should return -EINVAL instead of 0.
Also, return the error immediately on fsl_esdhc_initialize() failure.Based on similar patches by Fabio Estevam for mx6sabresd, mx53loco, wandboard
Signed-off-by: Soeren Moch
Acked-by: Stefano Babic
20 Nov, 2014
27 commits
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Add the pfuze100 initialization in power_init_board for imx6q/dl
sabreauto board.Signed-off-by: Ye.Li
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Modify the pfuze init for mx6sxsabresd to use the shared
"pfuze_common_init" function. And move this initialization to
power_init_board.Signed-off-by: Ye.Li
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Modify the pfuze init for mx6sabresd to use the shared
"pfuze_common_init" function. And move this initialization to
power_init_board.Signed-off-by: Ye.Li
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Since the Pfuze initializations are similar on various mx6 SABRE
boards. Factorize the initialization to a common function in file
board/freescale/common/pfuze.c. So that all SABRE boards BSP can
share the function.Signed-off-by: Ye.Li
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Add definitions for buck regulators (SW1A/B/C) registers and voltage
values.Signed-off-by: Ye.Li
Reviewed-by: Przemyslaw Marczak -
Add full support for USDHC2, USDHC3, USDHC4 on mx6sx sabresd board.
The default boot socket is USDHC4, so the MMC environment device and
mmcdev variable are set to this device.Signed-off-by: Ye.Li
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The reset value of "uSDHCx_INT_STATUS_EN" register is changed to 0
on iMX6SX. So the fsl_esdhc driver must update to set the register,
otherwise no state can be detected.Signed-off-by: Ye.Li
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In U-boot it is preferred to access the register via structure pointer, so
convert it such style.Signed-off-by: Fabio Estevam
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Signed-off-by: Markus Niebel
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setup_i2c has a return value. Use it to give feedback
on error.Signed-off-by: Markus Niebel
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Add include needed to have prototype for board_spi_cs_gpio
Signed-off-by: Markus Niebel
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This is nowhere documented and only used
by two other boards. Replace it with
TQMA6_SPI_FLASH_SECTOR_SIZE.Signed-off-by: Markus Niebel
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Let's add mx6sabresd_spl_defconfig entry into MAINTAINERS, so that we avoid
getting a warning that the mx6sabresd_spl is not maintained.Signed-off-by: Fabio Estevam
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We can simply the return the value from enable_fec_anatop_clock() to make the
code smaller and simpler.Signed-off-by: Fabio Estevam
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We can simply the return the value from enable_fec_anatop_clock() to make the
code smaller and simpler.Signed-off-by: Fabio Estevam
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Make clear that current SPL code only supports the mx6q variant.
Signed-off-by: Fabio Estevam
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When an invalid USDHC port is passed we should return -EINVAL instead of 0.
Also, return the error immediately on fsl_esdhc_initialize() failure.
Signed-off-by: Fabio Estevam
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When an invalid USDHC port is passed we should return -EINVAL instead of 0.
Also, return the error immediately on fsl_esdhc_initialize() failure.
Signed-off-by: Fabio Estevam
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Signed-off-by: Albert ARIBAUD
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mx6sabreauto boards come with 32 MiB of parallel NOR flash.
Add support for it:
U-Boot 2015.01-rc1-18107-g1543636-dirty (Nov 14 2014 - 11:11:04)
CPU: Freescale i.MX6Q rev1.2 at 792 MHz
Reset cause: POR
Board: MX6Q-Sabreauto revA
I2C: ready
DRAM: 2 GiB
Flash: 32 MiB
NAND: 0 MiBDue to pin conflict with I2C3, only define configure I2C3 IOMUX when flash is
not used.Signed-off-by: Fabio Estevam
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Signed-off-by: Fabio Estevam
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Move MX5 specific set_chipselect_size function into generic i.MX part,
such that MX6 based boards are able to use this function as well.While doing this the iomuxc gpr member needed to be consolidated between
MX5 and MX6.Signed-off-by: Fabio Estevam
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Many boards use a minimal .cfg file in the SPL case.
Introduce spl_sd.cfg so that we can reuse it.
Signed-off-by: Fabio Estevam
Acked-by: Stefano Babic -
mx6sabresd_spl.cfg configures CCM registers, GPR registers and CCM_CCOSR.
Move the configuration to the spl code.
CCM_CCOSR setting is no longer required to get audio functionality in the
kernel, so remove such setting.Signed-off-by: Fabio Estevam
Reviewed-by: Marek Vasut -
mx6sabresd_spl.cfg configures CCM registers, GPR registers and CCM_CCOSR.
Move the configuration to the spl code.
CCM_CCOSR setting is no longer required to get audio functionality in the
kernel, so remove such setting.Signed-off-by: Fabio Estevam
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mx6sabresd_spl.cfg configures CCM registers, GPR registers and CCM_CCOSR.
Move the configuration to the spl code.
CCM_CCOSR setting is no longer required to get audio functionality in the
kernel, so remove such setting.Signed-off-by: Fabio Estevam
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Commit 3ff46cc4 fixed exception vectors setting in
the general ARM case, by either copying the exception
and indirect vector tables to normal (0x00000000) or
high (0xFFFF0000) vectors address, or setting VBAR to
U-Boot's base if applicable.i.MX27 SoC is ARM926E-JS, thus has only normal and
high options, but does not provide RAM at 0xFFFF0000
and has only ROM at 0x00000000; it is therefore not
possible to move or change its exception vectors.Besides, i.MX27 ROM code does provide an indirect
vectors table but at a non-standard address and with
the reset and reserved vectors missing.Turn the current vector relocation code into a weak
routine called after relocate_code from crt0, and add
strong version for i.MX27.Series-Cc: Heiko Schocher
Signed-off-by: Albert ARIBAUD
Reviewed-by: Stefano Babic
Tested-by: Stefano Babic
Tested-by: Philippe Reynes
Tested-by: Philippe Reynes
