19 Mar, 2019

1 commit

  • The mmc_select_mode_and_width() function can be called while the card
    is in HS200/HS400 mode and can be used to downgrade the card to lower
    mode, e.g. HS. This is used for example by mmc_boot_part_access_chk()
    which cannot access the card in HS200/HS400 mode and which is in turn
    called by saveenv if env is in the MMC.

    In such case, forcing the card clock to legacy frequency cannot work.
    Instead, the card must be switched to HS mode first, from which it can
    then be reprogrammed as needed.

    However, this procedure needs additional code changes, since the current
    implementation checks whether the card correctly switched to HS mode in
    mmc_set_card_speed(). The check only expects that the card will be going
    to HS mode from lower modes, not from higher modes, hence add a parameter
    which indicates that the HS200/HS400 to HS downgrade is happening. This
    makes the code send the switch command first, reconfigure the controller
    next and finally perform the EXT_CSD readback check. The last two steps
    cannot be done in reverse order as the card is already in HS mode when
    the clock are being switched on the controller side.

    Signed-off-by: Marek Vasut
    Cc: Jaehoon Chung
    (cherry picked from commit 523f613609545252f08f01f346ba4b0403f78b7c)
    Signed-off-by: Haibo Chen

    Marek Vasut
     

18 Mar, 2019

3 commits

  • Update the lpddr4 timing config to align with the ddr tool

    Signed-off-by: Jacky Bai
    Reviewed-by: Ye Li
    (cherry picked from commit a1433dec3a03a6c944b61600e7b317e2a83f2981)

    Jacky Bai
     
  • The normal ready time of M4 side is less than 1s, so we can use
    2s as the timeout of connection. The current value is 10s, which seems
    a little long if M4 SRTM service does not run.

    Signed-off-by: Ye Li
    Acked-by: Peng Fan
    (cherry picked from commit 4792d8967d3c631d055c133303bb6385b822a3ca)

    Ye Li
     
  • There are two LPCG HW issues reported in TKT322331. Add workaround
    for them in u-boot.
    1. Back to back LPCG write access must have 4x DSC cycle interval.
    2. When DSC clock is gated, LPCG write access may be missed due to
    the edge detect is not see by DSC. Two writes shall be performed
    to re-enable the clock if DSC clock is gated

    Signed-off-by: Ye Li
    Reviewed-by: Peng Fan
    (cherry picked from commit 96186ca0048e6ae261176e5f3ebf02be09bacb08)

    Ye Li
     

15 Mar, 2019

1 commit

  • When switching ARM root clock source from ARM PLL to 24M OSC,
    found the ARM timer may stop on few chips during stress reboot test.
    The system counter is still increasing, but ARM timer is stopped.

    Add a workaround that switch ARM clock source from ARM PLL to
    Sys PLL2 500M clock instead of 24M OSC. Stress reboot test is
    passed on all failed chips.

    Signed-off-by: Ye Li
    (cherry picked from commit 74770228976c013a3e289b21f6e27334ea97bee4)

    Ye Li
     

14 Mar, 2019

5 commits

  • Fix coverity issue: CID 2970630: Resource leak (RESOURCE_LEAK)
    leaked_storage: Variable cdns going out of scope leaks the storage
    it points to.

    Memory allocated by devm_kzalloc() won't be freed automatically in
    u-boot, free the memory manually here.

    Test: Coverity scan pass.

    Change-Id: I3000a2385941cef3b8b7e01611cfdc999971a4ca
    Signed-off-by: Luo Ji

    Luo Ji
     
  • Fix coverity issues as:
    CID 5899697: Dereference before null check (REVERSE_INULL)
    CID 3616594: Unchecked return value (CHECKED_RETURN)
    CID 3616598: Resource leak (RESOURCE_LEAK)
    CID 3616591: Resource leak (RESOURCE_LEAK)

    Test: Coverity scan pass.

    Change-Id: I70abb41c3cd825c6eec43dc7e5baec716ae46680
    Signed-off-by: Luo Ji

    Luo Ji
     
  • Fix coverity issue:
    CID 43787: Buffer not null terminated (BUFFER_SIZE_WARNING)
    buffer_size_warning: Calling strncpy with a maximum size argument
    of 32 bytes on destination array sdev.name of size 32 bytes might
    leave the destination string unterminated.

    Test: Coverity scan pass.

    Change-Id: Ib10e631bab893cb9cd1484082229f806b02849ba
    Signed-off-by: Luo Ji

    Luo Ji
     
  • Fix coverity issue: CID 1477258: Uninitialized scalar variable (UNINIT)
    uninit_use_in_call: Using uninitialized value txbuf when calling __fswab32.

    Test: Coverity scan pass.

    Change-Id: If57f70c272ef49a6636a59ae3b5dcc5430fd1753
    Signed-off-by: Luo Ji

    Luo Ji
     
  • change the mtd rootfs partition index number for i.MX8QXP lpddr4 validation board.

    Signed-off-by: Han Xu
    (cherry picked from commit 2d5923f215dfcc74b187e3b7ec4af1d0c9462d45)

    Han Xu
     

12 Mar, 2019

8 commits

  • Add defconfig file to support dual bootloader for xen.

    Test: build and boot on imx8qm_mek.

    Change-Id: I21e372b71a9b25e4cbf71cf7f41cfd87296b9afe
    Signed-off-by: Ji Luo

    Ji Luo
     
  • Meet the build error below with ARM2 SPL defconfig
    arch/arm/mach-imx/imx8/image.c: In function ‘spl_nor_get_uboot_base’:
    arch/arm/mach-imx/imx8/image.c:224:13: error: ‘CONFIG_SYS_UBOOT_BASE’
    undeclared (first use in this function)
    if (end
    Reviewed-by: Peng Fan
    (cherry picked from commit a96fd317601db7f21402e5f74fe24653e2af8ae7)

    Ye Li
     
  • Trusty is not supported for xen so we don't need to check
    the keyslot package or rollback index in spl. Reassign the
    dram address for spl and u-boot to avoid conflicts.

    Support serial init functions to enable debug console
    in spl when xen is running.

    Test: Boot and A/B slot switch on imx8qm_mek.

    Change-Id: If6829252f1ec2e32255f951715c8747181951fd0
    Signed-off-by: Ji Luo
    Reviewed-by: Peng Fan

    Ji Luo
     
  • Fix resource leak in libavb, coverity issue:
    CID 5899691: Resource leak (RESOURCE_LEAK) leaked_storage: Variable
    hash_out going out of scope leaks the storage it points to.

    CID 5899689: Resource leak (RESOURCE_LEAK) leaked_storage: Variable
    hash_buf going out of scope leaks the storage it points to.

    CID 5899688: Uninitialized pointer read (UNINIT) uninit_use: Using
    uninitialized value digest.

    CID 5899692: Structurally dead code (UNREACHABLE) unreachable: This
    code cannot be reached: goto out;

    Test: Coverity scan pass.

    Change-Id: If8e26fdd383c32a9160775006621830b42c0f07e
    Signed-off-by: Luo Ji

    Luo Ji
     
  • Fix coverity issue: CID 5433686: Uninitialized scalar variable (UNINIT)
    uninit_use_in_call: Using uninitialized value value when calling
    call_imx_sip_ret2.

    Test: coverity scan pass.

    Change-Id: Id89f8f6f69fb944179b34dca4146fd7636505681
    Signed-off-by: Luo Ji

    Luo Ji
     
  • Fix coverity issue CID 3298992: Double free (USE_AFTER_FREE)
    double_free: Calling free frees pointer rsrc_data which has
    already been freed.

    Check the rsrc_data buffer before free to avoid free NULL
    pointer.

    Change-Id: I781e87667a5d3bbe25ec12fbae8e3958d9b29244
    Signed-off-by: Luo Ji

    Luo Ji
     
  • The enable pin of USB is controlled by i2c IO expender which is
    controlled by M4 image. Add macro to enable virtual i2c function. It
    will send i2c message to M4 side to enable USB phy chip.

    Change-Id: Ib7ed710d293b002526be3bd233921797eb9c6d41
    Signed-off-by: Zhang Bo

    Zhang Bo
     
  • Image size is about 30M and 0x8028000+30M has overlaped with malloc
    memory. malloc memory end address is 0x88000000 and need to decrease the
    malloc size to reserve enough memory for loading kernel and dtb image.

    The memory address 0x90000000~0x92000000 has been reserved for M4 in
    SCFW. Need to change the HDMI firmware loading address to 0x84000000
    which is aligned with BSP image.

    Change-Id: I6f9b6e05a9c9d8b5f7d385632a0ef54a0c20667d
    Signed-off-by: Zhang Bo

    Zhang Bo
     

11 Mar, 2019

2 commits

  • We are currently using SC_R_LAST as a marker for imx8 power domain tree
    nodes without a resource attached. This value is compiled into dtb as
    part of the linux build and used by uboot.

    The SC_R_LAST constant changes frequently as SCFW resources are added
    (by design) and every time we need to update linux and uboot headers
    together or boot can fail.

    Fix this by replacing SC_R_LAST usage with a new constant SC_R_NONE
    defined to be 0xFFF0.

    Signed-off-by: Leonard Crestez
    Reviewed-by: Peng Fan
    (cherry picked from commit 93f302a6642adedfdd6336b22d08f32284539e35)

    Leonard Crestez
     
  • Also fixes MLK-21051: Replace manually added pads with defines from SCFW
    export package.

    Signed-off-by: Leonard Crestez
    Acked-by: Fugang Duan
    (cherry picked from commit cc76365cb15dc9d4ba3983ec93094c6017e12d83)

    Leonard Crestez
     

08 Mar, 2019

2 commits

  • Move spl to 0x8000_0000 will cause cpu1 ~ cpu3 jump to spl when
    boot/reboot, revert this patch.

    This reverts commit 7d111f4c8bac25c234b0fc24af885421ce8bb188.

    Change-Id: I9adcd980b42a7539d6309cafaabff9d079ca993d

    Ji Luo
     
  • Currenlty U1 and U2 low power modes are allowed in device mode.
    Allowing U1 and U2 low power modes during data transfers in
    device mode is causing U1 exit failure on some USB3 host: which
    will transite to SS.inactive instead of U0, then host will send
    warm reset and ultimately result in reenumeration. This is observed
    on UUU tool with some PC host. Hence disable U1 and U2 low power
    modes for now.

    USB3 spec 7.5.10.4.2 Exit from Recovery.Configuration
    The port shall transition to eSS.Inactive when the following
    conditions are met:
    1. Either the Ux_EXIT_TIMER or the 6-ms timer
    (tRecoveryConfigurationTimeout) times out.
    2. For a downstream port, the transition to Recovery is not to
    attempt a Hot Reset.

    Signed-off-by: Li Jun
    (cherry picked from commit ae0cdc741f7313398539f7b576ced73871f6cd71)

    Li Jun
     

07 Mar, 2019

1 commit

  • The spl is located at ocram which will be lost when suspend/resume,
    partition reboot will make A core reboot from the start address of
    ATF, which blocks dual bootloader feature on Android Auto.

    Move the spl to dram and make the partition reboot from spl to fix this
    issue. The memory map will be changed to:
    SPL: 0x0000_0000 --------> 0x8000_0000
    ATF: 0x8000_0000 --------> 0x8004_0000
    U-boot: 0x8002_0000 --------> 0x8006_0000

    Test: reboot ok on imx8qm/imx8qxp.

    Change-Id: I49e8be51bf427dd00eb7507de22a787c6f6e1582
    Signed-off-by: Ji Luo

    Ji Luo
     

05 Mar, 2019

4 commits

  • The HDMI digital PLL, bus clock and core clock need to change to improve the
    firmware loading time. The clock are now set to 800 MHz for DPLL, 200 MHz for
    HDMI core, and 100 MHz for HDMI bus.

    Signed-off-by: Oliver Brown

    Oliver Brown
     
  • Currently when SPL load 3rd container, it will do the authentication
    unconditionally. But when running SPL on Xen, the seco authentication
    is not supported, and cause failure in loading.

    Change the parser codes to depend on CONFIG_AHAB_BOOT to do the
    authentication.

    Signed-off-by: Ye Li
    Acked-by: Peng Fan
    (cherry picked from commit e38169a27fbe052561c5b369500e80477760ec3e)

    Ye Li
     
  • Create new config file based on "imx8mq_aiy_android_defconfig"
    and enable the CONFIG_IMX_TRUSTY_OS to supprt Trusty OS for AIY.
    Also enlarge the malloc poll to 96 MB because calculate hash
    with CAAM will consume more heap memory.

    Test: Trusty OS boots up and CAAM functions work.

    Change-Id: Ia4bdf4c32617cb4d2951b63f34f3a4a83f4af1b5
    Signed-off-by: Ji Luo

    Ji Luo
     
  • Trusty OS will check and require the memory passed from non-secure world
    is inner shareable. Change the memory attribute as PTE_BLOCK_INNER_SHARE
    in u-boot to meet the requirement.

    Test: build and boot on imx8qm/imx8qxp.

    Change-Id: I1aac9b430ecc0fa94f9a1f6dd519b34ce6fef7bd
    Signed-off-by: Ji Luo

    Ji Luo
     

04 Mar, 2019

2 commits

  • Check the return values for SCFW APIs and print error logs
    if the return value is not "SC_ERR_NONE".

    Test: boot on imx8qm.

    Change-Id: Ic7008bd2656375875e77dd3c922dafb1be145357
    Signed-off-by: Ji Luo

    Ji Luo
     
  • On iMX8MM, the V flag in TRISTR register only reflect the state of SNSR
    value, not the calibrated TEMP value. So checking this flag is not
    reliable. Per IC suggestion, change to read the TEMP/AVG_TEMP directly
    and check whether it in valid range 10-125C.

    Signed-off-by: Ye Li
    (cherry picked from commit fe41c5fa6af88cce7f5a9723c82d6ad4e61357ce)

    Ye Li
     

27 Feb, 2019

2 commits

  • Update SCFW API to v1.3 at below commit. A new API sc_pm_set_boot_parm
    is added.

    commit c5ef21f894de0ac8329f0fe540331a272fcd1461
    Author: Chuck Cannon
    Date: Tue Feb 26 15:36:53 2019 -0600

    SCF-352: Add more to SECO test.

    Signed-off-by: Chuck Cannon

    Signed-off-by: Ye Li
    Acked-by: Peng Fan
    (cherry picked from commit e79209e4174054bb328bae441bf8ab3c1312ee4e)

    Ye Li
     
  • Set the default environment "panel" as "NULL" to fix the
    LVDS0-HDMI not work issue.

    Test: LVDS0-HDMI works fine on imx8qm_mek.

    Change-Id: I115b0a185717762af911fe1e9237fb26ecbb7e3e
    Signed-off-by: Ji Luo

    Ji Luo
     

26 Feb, 2019

9 commits