31 May, 2018
6 commits
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Add defconfigs for iMX6SX 14x14 ARM2 boards to support SD boot,
NAND boot, plugin.Signed-off-by: Ye Li
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To support various boot devices on iMX6SX 17x17 ARM2, add the
relevant defconfigs.Signed-off-by: Ye Li
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Porting the 17x17 ARM2 and 14x14 ARM2 board codes from v2017.03. The
14x14 ARM2 shares similar board design with 17x17 ARM2, but uses LPDDR2
memory. So share the codes for them.Signed-off-by: Ye Li
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Add DTS file for the iMX6SX 14x14 ARM2 from v2017.03
Signed-off-by: Ye Li
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Add DTS files to support iMX6SX 17x17 ARM2. Due to pin conflicts,
need specified DTS for SPI nor enabled and NAND/EIMNOR enabled.Signed-off-by: Ye Li
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Since the fdt API is changed, update to use devfdt_get_addr.
Otherwise, build the DM SPI will fail.Signed-off-by: Ye Li
23 May, 2018
34 commits
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The GIC clock rate has some limitation, it should be
set to higher than 100MHz when NOC frequency is set to
the highest frequency. So switch the GIC clock source
to sys_pll2_100mhz.Signed-off-by: Bai Ping
(cherry picked from commit bd4cfcb391389287894bb5cd715be0a67f6332cf) -
like for i.MX 8mq ATF passes as argument to u-boot
the start and the length of the BL32 firmware.
u-boot uses this information to adjust the size of the DDR for linux.Signed-off-by: Silvano di Ninno
Acked-by: Peng Fan
(cherry picked from commit e9ec5ea8dbe3d12b40ba22fe36400cfe98e1bd44) -
Enable the NXP TMU driver in defconfig, so the uboot can display the
current CPU temperature.Signed-off-by: Ye Li
Reviewed-by: Peng Fan
(cherry picked from commit a06e26ccaec53e4b21d8d0482bb19f9a7dc90ad9) -
Add the TMU node for iMX8MM, which don't need calibration data from
DTB.Signed-off-by: Ye Li
(cherry picked from commit e3f62647c529583af25ddca21c91e8a03adba499) -
The analog sensors on iMX8MM are new, used for 14LPP process. So the
Temperature Sensor Monitoring Unit (TMU) has some change accordingly.
We use version 2 in TMU driver to represent the new TMU, so the one driver
can service for both MQ and MM.Signed-off-by: Ye Li
(cherry picked from commit 86fab918e607221249acc5c9a8f8eca01c17ec37) -
Introduce spl_qspi.cfg for booting from qspi.
Add new defconfig files.Signed-off-by: Peng Fan
(cherry picked from commit f6ccfcc1eefc45b75f07d8285e9af3d153eb3510) -
When boot type could not be detected from rom sw info,
read sbmr1 to detect, here we only use it to detect FLEXSPI
boot, because ROM not update it in rom sw info.Signed-off-by: Peng Fan
(cherry picked from commit 3735aedbf6dbebfac830089618ca334c419f43bd) -
Extend spl_nor to support FIT image loading.
CONFIG_SYS_UBOOT_BASE is the Uboot location in NOR memmap address.Signed-off-by: Peng Fan
(cherry picked from commit 60e943cd1a7c248eccc8892073efdada588a208d) -
Since default values of some registers of pmic not match well our board
design, add BD71837/BD71840 pmic support in spl, for example, RESET key
(PWRON_B) pushing time, VDD_DRAM too low for 3Ghz DDR.Signed-off-by: Robin Gong
Reviewed-by: Peng Fan -
The imx8mm has changed the address of rvt_hab, use new address for imx8mm.
Also enable fuse driver in SPL and update registers maps.The authentication procedure is same as imx8mq. In u-boot, the authentication
uses SIP call to trap ATF to run HAB authenticate.
Need to work with ATF commit:
(commit 7a4d6f90e999ed413d520310cc199901b52b7a04)Users need to add CONFIG_SECURE_BOOT=y to imx8mm_evk_defconfig to enable
the feature.Signed-off-by: Ye Li
Acked-by: Peng Fan
(cherry picked from commit 1118c9960c22c80a452181c6857fd1df86fe05ae) -
Add iMX8QM HDMI RX firmware loading.
Signed-off-by: Sandor Yu
(cherry picked from commit 969d93660e1b34765627ff9f6f8dcab08dcd1250) -
We clean USBOTG register USBCMD if it is used in serial download mode.
When XRDC blocking is enabled, we can't write this register directly,
must enable the OTG power, otherwise the kernel will get SError
exception in mfgtool.Signed-off-by: Ye Li
(cherry picked from commit cf2143dc97b2a8f21b828c7386c59ee965d981f2) -
MX7ULP needs to have the QSPI interrupt configured as a wakeup source
in the SIM_WKPU_WAKEUP_ENABLE register, otherwise the QSPI interrupts
do not wakeup the CPU from idle mode leading to poor performance in
Linux.The SIM_WKPU_WAKEUP_ENABLE register only exists in B0 silicon, so
make sure to only write to this register in the B0 version (or greater).Signed-off-by: Fabio Estevam
(cherry picked from commit 1ab33446d6843f560fb6d14c781f6417225f8f3d) -
i.MX8QXPB0 mfgtool ramfs may exceed the memory layout boundary with new
layout, change the dtb load address from 0x83800000 to 0x83100000 to
only reserve 1MB for dtb, which should be enough and leave 15MB for
ramfs.Signed-off-by: Han Xu
(cherry picked from commit 1a7cd5fb2f0f3b853d60fbd52e03cec0f061d329) -
Enable ARCH_MISC_INIT to get arm trusted firmware commit as
i.MX8MQ.Use savedefconfig to update the config file
Signed-off-by: Peng Fan
(cherry picked from commit 8e9e5c221d5a893e87d4c7da6564f2db7f4ef95f) -
Enable the USB host and device support, add relvent board level codes
and settings.For device mode, the gadget is fixed on USB device 0. Can't support
gadget on USB device 1.Signed-off-by: Ye Li
Acked-by: Peng Fan
(cherry picked from commit 62dab68436bb0a7cc53b506dad9168b9f10d0b3d) -
When unregister gadget driver in ci_udc, the usb device is not
removed or stop. This causes next "usb start" fails to work.Add a new interface "usb_remove_ehci_gadget" in usb-uclass to
remove the usb device for DM driver. Using "usb_lowlevel_stop" for
non-DM driver.Signed-off-by: Ye Li
(cherry picked from commit c73d137e0a4a613a49f6f63ec63332508afb88c0) -
Enable the OTG power on, add clock fuction and USB base address.
Signed-off-by: Ye Li
(cherry picked from commit d4f12cd92b18283daca35b35339a96c557f5127c) -
Since the i.MX8MM reuses the otg controllers on i.MX7D. We can use
CONFIG_USB_EHCI_MX7 for them.Due the TCPC and load switch are used on Typec circuit. Add the
board_usb_init and board_usb_cleanup to ehci-mx6 DM driver. So
we can implement the TCPC settings in these board functions.Signed-off-by: Ye Li
(cherry picked from commit 67699e88aed8bd36e919f54f9555ae15595faaf7) -
Add usb alias for otg1 and otg2. Enable two nodes in
EVK DTS.Signed-off-by: Ye Li
(cherry picked from commit c60654d45e75ca46d4b33df48429ea49bc6dde05) -
On iMX8MM EVK, the USB2 port is the primary power supply, when USB2 is charging,
the 3483_EN_SNK1 is not enabled. In the board, we init the tcpc of USB2 first with
PD enabled. If it is charging, when init the tcpc of USB1 we disable the PD,
otherwise we enable PD on USB1.The USB PD switch NX20P3438 needs to exit dead battery mode before
enable EN_SINK, otherwise the OVP is fixed at 6.8V. Also the OVP threshold needs set to
23V, when we switch to use 20V VBUS input.Due to HW issue, after we switched to 9V/20V, set on/off button to off then set back it to
on, the board can't power up. In this patch we limit the voltage to 5V, will change back
to 9V/20V when HW fixes the issue.Signed-off-by: Ye Li
Acked-by: Peng Fan
(cherry picked from commit e3579303f0e050aeeee938584492f76840e4bb97) -
On iMX8MM EVK, there are two USB ports. Both can support USB PD, but
with USB2 has HW priority.So we Change tcpc_pd_sink_check_charging to public function and
use it to know whether the USB tcpc is power charging.Additional, add disable_pd to init config. So we can disable PD session
for uncharged or lower priority port.Signed-off-by: Ye Li
(cherry picked from commit 867b0263d60bb5385b09cfa21d6f620bea855075) -
The CD pin on SD2 socket is not connected by hardware, because this pin
is used as ALERT pin of PTN5110. So we have to use DAT3 for CD detection.Since the USDHC driver does not support using DAT3 for CD, we have set this
port to non-removable in DTS. In SPL, we switch the pad setting of DAT3 for
CD detecting.Signed-off-by: Ye Li
Reviewed-by: Peng Fan
(cherry picked from commit a5dd1efd639e65e026b3175735329a3aaaaab7a0) -
Power up MU, otherwise virtual machines will crash when accessing MU.
Signed-off-by: Peng Fan
(cherry picked from commit 6ca671d3e1597f27b4c2100cabeabd9fb87e9adf) -
In case CONFIG_USB_CDNS3_GADGET_FORCE_HIGHSPEED, we should set
the maxpacketsize to be 512 instead of 1024.Reviewed-by: Ye Li
Acked-by: Peter Chen
Signed-off-by: Li Jun
(cherry picked from commit 5e05784a89ec2fbbda9298f2c74ade134213b8c4) -
The DDR memory is not assigned to SECO partition. When XRDC is enabled,
SECO can't access the memory where the kernel image is loaded.
So we have to explicitly set the memory access permission for SECO.Signed-off-by: Ye Li
Acked-by: Peng Fan -
Add i.MX8MM EVK board support
LPDDR4 code is still keep in old coding style to ease updating
if there is no code released.
dts is synced from kernel with sd2 regulator start up delay and off on
delay added.Signed-off-by: Peng Fan
(cherry picked from commit 01b3f229b188e28b0887c0b32f66e939a50d3a69)
Signed-off-by: Ye Li -
Since the SD is usdhc2 and eMMC is usdhc3, this cause mapping problem
for spl_boot_device. So far hard coded them to correct MMC index, so
that SD and eMMC boot can work.Signed-off-by: Ye Li
Signed-off-by: Peng Fan
(cherry picked from commit 3e4123fb3d6945a466563f4505a56bb0ea6f4ca0) -
Sync dts from Linux kernel commit
3091745d6acfdad21("MLK-18210 ARM64: dts: imx8qm: correct the pds of pcie").Signed-off-by: Peng Fan
(cherry picked from commit 0e7a5484878338d0dff871b6d21092a0479f07b4) -
The address size is 3 bytes when using BAR mode, but the driver
supposes the 4bytes mode is enabled and uses 4 bytes address. This
cause address issue.Also the mask needs set to 23bits for 3 bytes address.
Signed-off-by: Ye Li
Signed-off-by: Peng Fan
(cherry picked from commit 2e9a9e0fe379306f7c1065f9afa9e67386be2503) -
If not initialize unused LUT to 0, the value is random which might
cause qspi command failure.On i.MX8QM/QXP, it works ok because ROM inittialize them to 0, but on
i.MX8MM, ROM not initialize them, so let's do it here.Signed-off-by: Peng Fan
(cherry picked from commit c4bd49c7b249073415f052fb28cd5a4ad374a318) -
Add compatible entry in imx8m pinctrl driver for i.MX8MM
Signed-off-by: Peng Fan
(cherry picked from commit 34b5eaaafe81db4d0cbe07c39aad2ec4c8d2c9a2) -
Add cpu revision for i.MX8MM
Add helper functionSigned-off-by: Peng Fan
(cherry picked from commit 5fdfc7d73157a5eb9254b43f65edd1bb5f13fd16) -
Using the cpu chip id in DIGPROG registers 0x824110
Signed-off-by: Ye Li
Signed-off-by: Peng Fan
(cherry picked from commit 330051b4fbcdda201b67a94e72345ec47bd85a96)
