07 Oct, 2017
1 commit
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This board is based on Intel Tangier SoC (Intel Merrifield platform)
and may utilize ACPI powerfulness.Bring minimum support by appending initial DSDT table for it.
Note, the addresses for generated tables are carefully chosen to avoid
any conflicts with existing shadowed BIOS data. The user have somewhat
like ~31 kB available for compiled ACPI tables that ought to be enough.Reviewed-by: Bin Meng
Signed-off-by: Andy Shevchenko
16 Sep, 2017
1 commit
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This adds support to Intel Cherry Hill board, a board based on
Intel Braswell SoC. The following devices are validated:- serial port as the serial console
- on-board Realtek 8169 ethernet controller
- SATA AHCI controller
- EMMC/SDHC controller
- USB 3.0 xHCI controller
- PCIe x1 slot with a graphics card
- ICH SPI controller with an 8MB Macronix SPI flash
- Integrated graphics device as the video consoleSigned-off-by: Bin Meng
Reviewed-by: Simon Glass
16 Aug, 2017
3 commits
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We are now using an env_ prefix for environment functions. Rename these
two functions for consistency. Also add function comments in common.h.Quite a few places use getenv() in a condition context, provoking a
warning from checkpatch. These are fixed up in this patch also.Suggested-by: Wolfgang Denk
Signed-off-by: Simon Glass -
We are now using an env_ prefix for environment functions. Rename setenv()
for consistency. Also add function comments in common.h.Suggested-by: Wolfgang Denk
Signed-off-by: Simon Glass -
Use the env_save() function directly now that there is only one
implementation of saveenv().Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Denk
Reviewed-by: Tom Rini
01 Aug, 2017
3 commits
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Only a specific type of SPI flash exists on a board, having board
Kconfig to select the SPI flash seems to make more sense. Other
flash types are not necessary except coreboot, which implies all
available flash drivers there.Signed-off-by: Bin Meng
Reviewed-by: Simon Glass -
This is architecture-dependent early initialization hence should
be put in the platform Kconfig.Signed-off-by: Bin Meng
Reviewed-by: Andy Shevchenko
Reviewed-by: Simon Glass -
CONFIG_BOARD_EARLY_INIT_F literally indicates board-specific codes
and should be not 'default y' for all x86 boards.Signed-off-by: Bin Meng
Reviewed-by: Andy Shevchenko
Reviewed-by: Simon Glass
30 Jul, 2017
1 commit
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Add Intel Edison board which is using U-Boot.
The patch is based on work done by the following people (in alphabetical
order):
Aiden Park
Dukjoon Jeon
eric.park
Fabien Chereau
Felipe Balbi
Scott D Phillips
Sebastien Colleur
Steve Sakoman
Vincent TinelliIn case we're building for Intel Edison, we must have 4096 bytes of
zeroes in the beginning on u-boot.bin. This is done in
board/intel/edison/config.mk.First run sets hardware_id environment variable which is read from
System Controller Unit (SCU).Serial number (serial# environment variable) is generated based on eMMC
CID.MAC address on USB network interface is unique to the board but kept the
same all over the time.Set mac address from U-Boot using following scheme:
OUI = 02:00:86
next 3 bytes of MAC address set from eMMC serial numberThis allows to have a unique mac address across reboot and flashing.
Signed-off-by: Vincent Tinelli
Signed-off-by: Felipe Balbi
Signed-off-by: Andy Shevchenko
Reviewed-by: Bin Meng
Reviewed-by: Simon Glass
[bmeng: Add MAINTAINERS file for Intel Edison board]
Signed-off-by: Bin Meng
22 Jun, 2017
1 commit
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GPIO bank E pin 8 & 9 are used to control the on-board two USB ports
VBUS on/off. Let's configure them in the misc_init_r().Signed-off-by: Bin Meng
Reviewed-by: Simon Glass
Reviewed-by: Stefan Roese
Tested-by: Stefan Roese
16 Aug, 2016
1 commit
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Without PS/2 keyboard and mouse in the ASL file, Windows does not
see them. No problem for Linux as it probes keyboard and mouse via
the legacy 8042 I/O port.Signed-off-by: Bin Meng
Reviewed-by: Simon Glass
30 May, 2016
1 commit
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Enable ACPI table generation by creating a DSDT table.
Signed-off-by: Bin Meng
Reviewed-by: Simon Glass
23 May, 2016
3 commits
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Override the default product name U-Boot reports in the SMBIOS
table, to be compatible with the Intel provided UEFI BIOS, as
Linux kernel drivers (drivers/mfd/intel_quark_i2c_gpio.c and
drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c) make use of
it to do different board level configuration.Signed-off-by: Bin Meng
Reviewed-by: Simon Glass -
Let git ignore dsdt.aml, dsdt.asl.tmp and dsdt.c files.
Signed-off-by: Bin Meng
Reviewed-by: Stefan Roese
Tested-by: Stefan Roese
Reviewed-by: Simon Glass -
Enable ACPI table generation by creating a DSDT table for all baytrail
boards: conga-qeval20-qa3-e3845, bayleybay and minnowmax.Signed-off-by: Bin Meng
Reviewed-by: Stefan Roese
Tested-by: Stefan Roese
Reviewed-by: Simon Glass
17 Mar, 2016
2 commits
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We don't need this anymore - we can use device tree and the new pinconfig
driver instead.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
Some of the LPC code is common to several Intel LPC devices. Move it into a
common location.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
21 Feb, 2016
1 commit
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This adds basic support to Intel Cougar Canyon 2 board, a board
based on Chief River platform with an Ivy Bridge processor and
a Panther Point chipset.Signed-off-by: Bin Meng
Acked-by: Simon Glass
05 Feb, 2016
1 commit
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asm/arch/gpio.h is not needed anymore as we get the GPIO base from
PCH driver.Signed-off-by: Bin Meng
Reviewed-by: Simon Glass
Tested-by: Simon Glass
09 Sep, 2015
3 commits
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Quark SoC holds the PCIe controller in reset following a power on.
U-Boot needs to release the PCIe controller from reset. The PCIe
controller (D23:F0/F1) will not be visible in PCI configuration
space and any access to its PCI configuration registers will cause
system hang while it is held in reset.Enable PCIe controller per Quark firmware writer guide.
Signed-off-by: Bin Meng
Acked-by: Simon Glass -
Move to driver model for USB and ETH on Intel Bayley Bay.
Signed-off-by: Bin Meng
Acked-by: Simon Glass -
Since E1000 driver has been converted to driver model, enable it
on Intel Crown Bay. But the Intel Topcliff GbE driver has not been
converted to driver model yet, disable it for now.Signed-off-by: Bin Meng
Acked-by: Joe Hershberger
26 Aug, 2015
1 commit
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So far we only enabled one legacy serial port on the SMSC LPC47m
superio chipset on Intel Crown Bay board. As the board also has
dual PS/2 ports routed out, enable the keyboard controller which
is i8042 compatible so that we can use PS/2 keyboard and mouse.In order to make PS/2 keyboard work with the VGA console, remove
CONFIG_VGA_AS_SINGLE_DEVICE. To boot Linux kernel with PIC mode
using PIRQ routing table, adjust the mask in the device tree to
reserve irq12 which is used by PS/2 mouse.Signed-off-by: Bin Meng
Reviewed-by: Simon Glass
14 Aug, 2015
1 commit
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Move to driver model for networking on minnowmax.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
05 Aug, 2015
3 commits
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Disable a few things which interfere with the EFI init. This allows the
Minnowboard MAX to boot into EFI, load a U-Boot payload then boot to the
U-Boot prompt.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
Intel Bayley Bay board is a BayTrail based board. Add this board
with existing baytrail fsp support.Signed-off-by: Bin Meng
Acked-by: Simon Glass -
On Intel BayTrail SoC, there is a legacy UART (I/O 0x3f8) integrated
into the SoC which is enabled by the FSP. Remove the smsc47x superio
initialization codes.Signed-off-by: Bin Meng
Acked-by: Simon Glass
04 Jun, 2015
2 commits
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Signed-off-by: Gabriel Huau
Acked-by: Simon Glass -
gd is not referenced in those board files so DECLARE_GLOBAL_DATA_PTR
should be removed.Signed-off-by: Bin Meng
Acked-by: Simon Glass
13 May, 2015
1 commit
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By making the board selections optional, every defconfig will include
the board selection when running savedefconfig so if a new board is
added to the top of the list of choices the former top's defconfig will
still be correct.Signed-off-by: Joe Hershberger
Cc: Masahiro Yamada
Acked-by: Stephen Warren
Cc: Tom Rini
30 Apr, 2015
3 commits
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Currently all x86 boards still use CONFIG_SYS_EXTRA_OPTIONS to define
the text base address. Since it is deprecated, just remove it and use
CONFIG_SYS_TEXT_BASE directly.Signed-off-by: Bin Meng
Acked-by: Simon Glass -
Let arch/x86/Kconfig prompt board vendor first, then select
the board model under that vendor. This way arch/x86/Kconfig
only needs concern board vendor and leave the supported target
list to board//Kconfig.Signed-off-by: Bin Meng
Acked-by: Simon Glass -
For starting a Linux console on the superio serial port under
interrupt mode, the IRQ number must be configured.Signed-off-by: Jian Luo
Signed-off-by: Bin Meng
Acked-by: Simon Glass
07 Feb, 2015
2 commits
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New board/intel/galileo board directory with minimum codes, plus
board dts, defconfig and configuration files.Signed-off-by: Bin Meng
Reviewed-by: Simon Glass
Acked-by: Simon Glass -
This is a relatively low-cost x86 board in a small form factor. The main
peripherals are uSD, USB, HDMI, Ethernet and SATA. It uses an Atom 3800
series CPU. So far only the dual core 2GB variant is supported.This uses the existing FSP support. Binary blobs are required to make this
board work. The microcode update is included as a patch (all 3000 lines of
it).Change-Id: I0088c47fe87cf08ae635b343d32c332269062156
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
13 Jan, 2015
1 commit
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Convert CONFIG_X86_RESET_VECTOR and CONFIG_SYS_X86_START16 to Kconfig
options so that we can remove them from board configuration file.Signed-off-by: Bin Meng
Acked-by: Simon Glass
19 Dec, 2014
4 commits
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We don't have driver for the Intel Topcliff PCH Gigabit Ethernet
controller for now, so enable the Intle E1000 NIC support, which
can be plugged into any PCIe slot on the Crown Bay board.Signed-off-by: Bin Meng
Acked-by: Simon Glass -
Signed-off-by: Bin Meng
Acked-by: Simon Glass -
Intel Tunnel Creek GPIO register block is compatible with current
ich6-gpio driver, except the offset and content of GPIO block base
address register in the LPC PCI configuration space are different.Use u16 instead of u32 to store the 16-bit I/O address of the GPIO
registers so that it could support both Ivybridge and Tunnel Creek.Signed-off-by: Bin Meng
Acked-by: Simon Glass -
Implement minimum required functions for the basic support to
queensbay platform and crownbay board.Currently the implementation is to call fsp_init() in the car_init().
We may move that call to cpu_init_f() in the future.Signed-off-by: Bin Meng
Acked-by: Simon Glass