05 Feb, 2021
1 commit
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i.MX8MQ B2 is using same value in OCOTP_READ_FUSE_DATA like B1, so
we have to check the ROM verision to distinguish the revision.As we have checked the B1 rev for sticky bits work around in
secure boot. So it won't apply on B2.Signed-off-by: Ye Li
Reviewed-by: Peng Fan
(cherry picked from commit 1ac96bde4920fa3e2a3bb4a79b342ca4f5adb4a5)
28 Jan, 2021
3 commits
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* origin/imx_v2020.04:
MA-18635 Android: eliminate build warnings
MA-18634-2 Android: sync config change
MA-18634-1 Android: refine config dependency -
* origin/ls_v2020.04:
arm: dts: ls1028a: define QDS networking protocol combinations -
Includes DT definition for the following serdes protocols using various
PHY cards: 85xx, 13xx, 65xx, 9999, 7777.Note that the default device tree for QDS now uses 85xx.
Enabling any of the others requires patching the fsl-ls1028a-qds.dtsi
file (the includes at the bottom of the file).Signed-off-by: Alex Marginean
Signed-off-by: Vladimir Oltean
27 Jan, 2021
2 commits
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* origin/ls_v2020.04:
net: memac_phy: add a timeout to MDIO operations
armv8: lx2: SVR_SOC_VER: Mask CAN_FD and security bit -
Multiple LX2(LX2160A/LX2162A SoC) personality variants
exists based on CAN-FD and security bit in SVR.Currenly SVR_SOC_VER mask only security bit.
Update SVR_SOC_VER to mask CAN_FD and security bit
for LX2 products.Signed-off-by: Wasim Khan
17 Jan, 2021
1 commit
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Refine the dependency of some configs to make it
easier to add/modify android config files.Test: builds.
Change-Id: Iccb044dadc7ce1e0b839bf83e2e9157e718f286c
Signed-off-by: Ji Luo
(cherry picked from commit 86f4f99a367bbc0ef99d4ab2a0b4078babfbfbd2)
14 Jan, 2021
3 commits
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* origin/imx_v2020.04:
LF-3161-2 mx6ul: bee: Remove XN bit for bee enabled region
LF-3161-1 arm: imx: Fix speculative instruction prefetch issue -
We will test a program on BEE enabled region, so remove XN bit
to allow execution when current MMU domain is changed to client.Signed-off-by: Ye Li
Reviewed-by: Peng Fan
(cherry picked from commit e4bd1734bcba2012d4d7dea7598635256f155c96) -
Default ARM32 MMU setting in u-boot sets XN bit to entire 4GB space no
matter which DCACHE option is used, and set domain permission to manager.
This causes MMU ignores the access check and XN bit, so speculative
instruction can fetch from entire space.This patch sets the DDR, ROM, OCRAM without XN bit, and set domain to client
to enable the XN and access check. So speculative instruction fetch can only
happens on these 3 regions to avoid prefetch from peripherals and invalid
regions.Signed-off-by: Ye Li
Reviewed-by: Peng Fan
(cherry picked from commit 25d70768c460bad91aa65f367203af41122399cd)
13 Jan, 2021
2 commits
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* origin/ls_v2020.04:
armv8: ls1028a: fix stream id allocation
configs: ls1088aqds: add COMMON_ENV to fix distroboot
board: fsl: ls2088ardb: Program GIC LPI configuration table -
When A-050382 errata is enabled, ECAM and EDMA have
conflicting stream id 40. This patch fixes the same.Signed-off-by: Nipun Gupta
21 Dec, 2020
1 commit
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* origin/imx_uboot:
MA-18406 Fix panic when provision keys on boards without rpmb key
MA-16954 set partition type to efi after flash gpt partition
MLK-25046 imx: bee: Fix build warning of flush_dcache_range
MA-18325 Pad keyslot_package struct to one block size
MA-18304 pass ramdisk address when boot up evk_7ulp
11 Dec, 2020
1 commit
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Fix below build warning when enabling BEE config on iMX6UL EVK board.
arch/arm/mach-imx/mx6/bee.c: In function ‘bee_test’:
arch/arm/mach-imx/mx6/bee.c:201:2: warning: implicit declaration of
function ‘flush_dcache_range’; did yomean ‘check_cache_range’?
[-Wimplicit-function-declaration]
201 | flush_dcache_range(address, address + range);
| ^~~~~~~~~~~~~~~~~~
| check_cache_rangeSigned-off-by: Ye Li
Reviewed-by: Peng Fan
(cherry picked from commit 134d22e59af3931d283c123c1aa3fc44cb86761d)
20 Nov, 2020
1 commit
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* origin/dn_uboot: (14 commits)
Revert "mmc: move mmc_power_cycle() after controller initialization"
Revert "mmc: rework mmc_set_initial_state"
board: freescale: vid.c: add parantheses to fix build warning
net: pfe_eth: read PFE ESBC header flash with spi_flash_read API
lx2160a: Fix address for secure boot headers
...
16 Nov, 2020
3 commits
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Low drive mode needs to update GPU freq in kernel DTB. But 5.4 and 5.10
kernel are using different GPU node pathes. Update low_drive_gpu_freq
to support both two paths.Signed-off-by: Ye Li
Reviewed-by: Peng Fan
(cherry picked from commit cb1c6e4279030b859133b9e4e4a0fb2c3e3cd45c) -
For dual core and single core iMX8M parts, the thermal node and PMU node
in kernel DTB also needs update to remove the refers to deleted core nodes.
Otherwise both driver will fail to work.Signed-off-by: Ye Li
Reviewed-by: Peng Fan
(cherry picked from commit 5434603dc85553f353a127594ca764c06e54de0a) -
There are 3 part numbers for 11x11 i.MX8MNano with different core number
configuration: UltraLite Quad/Dual/SoloComparing with i.MX8MN Lite parts, they have MIPI DSI disabled. So
checking the MIPI DSI disable fuse to recognize these parts.Signed-off-by: Ye Li
Reviewed-by: Peng Fan
(cherry picked from commit 05af9ac08052c92d011908726534e227db3143c4)
09 Nov, 2020
3 commits
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Two LCD data pins (D16 and D17) are missed in DTS to cause color issue,
also update pad setting to align with kernel.Signed-off-by: Ye Li
Acked-by: Peng Fan
(cherry picked from commit 90cf964cb4daebd66d5b8b0af944e2a2282b13d5) -
The value of Unique ID in uboot and kernel is different for iMX8MP:
serial#=02e1444a0002aaff
root@imx8mpevk:/sys/devices/soc0# cat soc_uid
D699300002E1444AThe reason is that Fuse Addresses of Unique ID of iMX8MP are 0x420 and
0x430.Reviewed-by: Ye Li
Signed-off-by: Alice Guo
(cherry picked from commit 38bcdd0bf78951480cb67e1b9d58b37c364195fc) -
Since iMX8MP LPDDR4 EVK uses OD for VDD_SOC, so we can set GIC clock
to 500Mhz to align with kernel. For DDR4 EVK, uses default 400Mhz for
ND VDD_SOC.
Move the codes from SOC codes to board level to match with voltage
setting.Signed-off-by: Ye Li
Reviewed-by: Peng Fan
(cherry picked from commit ba50b01b74873cbddaeba61f69e7763a8ba63227)
06 Nov, 2020
6 commits
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Update fuse path to disable modules correctly.
Reviewed-by: Ye Li
Signed-off-by: Peng Fan
(cherry picked from commit b414e6dfc20ec6430ab1069139d59e11dff0f5dd) -
Update node path for 5.10 Kernel.
- aips-bus renamed to bus
- gpmi-nand renamed to nand-controllerReviewed-by: Ye Li
Signed-off-by: Peng Fan
(cherry picked from commit 51ee59aa02cb0a88c64604faecd5b01022af5182) -
Following Linux, set GIC clk to 500M. If U-Boot has different settings
compared with kernel required, kernel will dump. However we could not
let kernel runtime change GIC clk parents, because it is CLK_IS_CRITICAL
and CLK_SET_PARENT_GATE, it will always fail. There is no otherway
to address the issue unless let U-Boot configure it ready.Reviewed-by: Ye Li
Signed-off-by: Peng Fan
(cherry picked from commit b6ddbcb9dc61e8822899349fc516d06941e7efd6) -
Because LCDIF has lots of pinmux conflict with modules like eQOS, SPI,
ADC, LPUART1, etc. We can't support it by default.
Introduce a new DTS for LCDIF enablement and disable conflicted nodes.Signed-off-by: Ye Li
Reviewed-by: Peng Fan
(cherry picked from commit 39840421d4e2d805df1420658629e78925f41490) -
Support iMX8DXL in mxsfb driver by below changes:
1. Enable iMX8 in lcdif registers file
2. Add u-boot clock driver support for iMX8
3. Change the FB buffer alignment to align it at allocation. So
it won't overlay with other memory at mmu_set_region_dcache_behaviourSigned-off-by: Ye Li
Reviewed-by: Peng Fan
(cherry picked from commit 6f02d6894509e0aa79df9d1bdf5029136e1493b5) -
Update the LCDIF clocks to align with u-boot clock driver.
Since u-boot imx8 clock driver can gate and divide on slice clock,
so it does not create two clocks on slice clock.Signed-off-by: Ye Li
Reviewed-by: Peng Fan
(cherry picked from commit c5fddad29b23cd74732b6aa3720bd8d62f41462e)
03 Nov, 2020
2 commits
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Check for NULL return value from fdt_getprop() in fdt_fixup_remove_jr()
Signed-off-by: Priyanka Singh
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The sdhc peripheral clock support for lx2162aqds was missed.
Fixes: 1f9ecf088930 ("armv8: lx2162a: Add Soc changes to support LX2162A")
Signed-off-by: Yangbo Lu
30 Oct, 2020
2 commits
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Signed-off-by: Ye Li
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This is a workaround.
Always open the regulator of the sensor to ensure that the
pull-up of i2c3 is 3.3v. Otherwise, there will be a 1.8v high level
pull-up before enable sensor regulator in kernel boot stage.Reviewed-by: Fugang Duan
Signed-off-by: Clark Wang
(cherry picked from commit 6db6c8bf1a60baad7032f92822a0030b077d3602)
29 Oct, 2020
8 commits
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Add gpio node for SoC LS208xA
Signed-off-by: Biwen Li
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Add gpio node for SoC LS1088A
Signed-off-by: Biwen Li
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Add gpio node for SoC LS1046A
Signed-off-by: Biwen Li
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Add gpio node for SoC LS1043A
Signed-off-by: Biwen Li
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Add gpio node for SoC LS1028A
Signed-off-by: Biwen Li
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Add gpio node for SoC LS1012A
Signed-off-by: Biwen Li
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Add gpio node for SoC LS1021A
Signed-off-by: Biwen Li
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Fix a bug as belows,
=> gpio status -a
"Synchronous Abort" handler, esr 0x96000061
elr: 0000000082047964 lr : 0000000082047960 (reloc)
elr: 00000000fbd72964 lr : 00000000fbd72960
x0 : 00000000ffffffff x1 : 000000000000000a
x2 : 0000000000000020 x3 : 0000000000000001
x4 : 0000000000000000 x5 : 0000000000000030
x6 : 0000000000000020 x7 : 0000000000000002
x8 : 00000000ffffffe0 x9 : 0000000000000008
x10: 0000000000000010 x11: 0000000000000006
x12: 000000000001869f x13: 0000000000000230
x14: 00000000fbc23e9c x15: 00000000ffffffff
...
resetingSigned-off-by: Biwen Li
19 Oct, 2020
1 commit
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Conflicts:
arch/arm/cpu/armv8/Kconfig
drivers/pci/pcie_layerscape_fixup.c
drivers/video/imx/Makefile
drivers/video/nxp/Kconfig
drivers/video/nxp/Makefile
drivers/video/nxp/hdp/Makefile
drivers/video/nxp/hdp/test_base_sw.cSigned-off-by: Ye Li