11 Mar, 2014
3 commits
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I have observed timeouts on a cubietruck.
The increase to 40ms is completely arbitrary and Works For Me(tm). I
couldn't find a good reference for how long you are supposed to wait,
although googling around it seems like tens of ms rather than single
digits is more common. I don't think there is any harm in waiting a bit
longer.Signed-off-by: Ian Campbell
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Signed-off-by: Ian Campbell
Acked-by: Rob Herring -
This allow the platform to register the platform ahci device.
Signed-off-by: Ian Campbell
10 Mar, 2014
1 commit
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CONFIG_SYS_HZ must be always 1000, but M5271EVB.h defines it
as 1000000 and idmr.h defines it as (50000000 / 64).When compiling these two boards, a warning message is displayed:
time.c:14:2: warning: #warning "CONFIG_SYS_HZ must be 1000
and should not be defined by platforms" [-Wcpp]There are no board maintainers for them so this commit just
deletes them.Signed-off-by: Masahiro Yamada
Cc: Jason Jin
08 Mar, 2014
14 commits
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Update following DDR related settings for T1040RDB, T1042RDB_PI
-Correct number of chip selects to two as t1040 supports
two Chip selects.
-Update board_specific_parameters udimm structure with settings
derived via calibration.
-Update ddr_raw_timing sructure corresponding to DIMM.
-Set ODT to off. Typically on FSL board, ODT is set to 75 ohm,
but on T104xRDB, on setting this , DDR instability is observed.
Board-level debugging is in progress.Verified the updated settings to be working fine with dual-ranked
Micron, MT18KSF51272AZ-1G6 DIMM at data rate 1600MT/s.Signed-off-by: Priyanka Jain
Signed-off-by: York Sun -
T1040 has internal display interface unit (DIU) for driving video.
T1040QDS supports video mode via
-LCD using TI enconder
-HDMI type interface via HDMI encoderChrontel, CH7301C encoder which is I2C programmable is used as
HDMI connector on T1040QDS.
This patch add support to
-enable Video interface for T1040QDS
-route qixis multiplexing to enable DIU-HDMI interface on board
-program DIU pixel clock gerenartor for T1040
-program HDMI encoder via I2C on boardSigned-off-by: Priyanka Jain
Reviewed-by: York Sun -
T1040 SoC has SCFG (Supplement Configuration) Block which provides
chip specific configuration and status support. The base address of
SCFG block in T1040 is 0xfc000.
SCFG contains SCFG_PIXCLKCR (DIU pixel clock control register)
at offset 0x28.Add definition of
-SCFG block
-SCFG_PIXCLKCR register
-Bits definition of SCFG_PIXCLK registerSigned-off-by: Priyanka Jain
Reviewed-by: York Sun -
T2080PCIe-RDB is a Freescale Reference Design Board that hosts the T2080 SoC.
It works in two mode: standalone mode and PCIe endpoint mode.T2080PCIe-RDB Feature Overview
------------------------------
Processor:
- T2080 SoC integrating four 64-bit dual-threads e6500 cores up to 1.8GHz
DDR Memory:
- Single memory controller capable of supporting DDR3 and DDR3-LP devices
- 72bit 4GB DDR3-LP SODIMM in slot
Ethernet interfaces:
- Two 10M/100M/1G RGMII ports on-board
- Two 10Gbps SFP+ ports on-board
- Two 10Gbps Base-T ports on-board
Accelerator:
- DPAA components consist of FMan, BMan, QMan, PME, DCE and SEC
SerDes 16 lanes configuration:
- SerDes-1 Lane A-B: to two 10G XFI fiber (MAC9 & MAC10)
- SerDes-1 Lane C-D: to two 10G Base-T (MAC1 & MAC2)
- SerDes-1 Lane E-H: to PCIe Goldfinger (PCIe4 x4, Gen3)
- SerDes-2 Lane A-D: to PCIe Slot (PCIe1 x4, Gen2)
- SerDes-2 Lane E-F: to C293 secure co-processor (PCIe2 x2)
- SerDes-2 Lane G-H: to SATA1 & SATA2
IFC/Local Bus:
- NOR: 128MB 16-bit NOR flash
- NAND: 512MB 8-bit NAND flash
- CPLD: for system controlling with programable header on-board
eSPI:
- 64MB N25Q512 SPI flash
USB:
- Two USB2.0 ports with internal PHY (both Type-A)
PCIe:
- One PCIe x4 gold-finger
- One PCIe x4 connector
- One PCIe x2 end-point device (C293 Crypto co-processor)
SATA:
- Two SATA 2.0 ports on-board
SDHC:
- support a TF-card on-board
I2C:
- Four I2C controllers.
UART:
- Dual 4-pins UART serial portsSigned-off-by: Shengzhou Liu
Reviewed-by: York Sun -
Change QIXIS timing parameter CONFIG_SYS_CS3_FTIM2 to 8 from 0.
Fix EMI2 for t2080qds, which was caused by adding t2081qds.Signed-off-by: Shengzhou Liu
Reviewed-by: York Sun -
This implements stashing of bootstage timing data to FDT and automatic
timing reporting. To enable define CONFIG_BOOTSTAGE_FDT and
CONFIG_BOOTSTAGE_REPORT respectively.Signed-off-by: Rommel G Custodio
Reviewed-by: York Sun -
USB spec says that the minimum disconnect threshold should be
over 525 mV. However, internal USB PHY threshold value is below
this specified value. Due to this some devices disconnect at
run-time. Hence, phy settings are tweaked to increased disconnect
threshold to be above 525mV by using this workaround.Signed-off-by: Suresh Gupta
Reviewed-by: York Sun -
SerDes PLLs may not lock reliably at 5 G VCO configuration(A006384)
and at cold temperatures(A006475), workaround recalibrate the
PLLs with some SerDes configurationBoth these errata are only applicable for b4 rev1.
So, make workaround for these errata conditional,
depending upon soc version.Signed-off-by: Shaveta Leekha
Reviewed-by: York Sun -
Change setting of SerDes2 refclk2 to have the default value as it is
coming on board that is 156.25MHz, for XFI to work.
Also change PLL_NUM variable to the one defined in config_mpc85xx.h
for B4860 and B4420.Signed-off-by: Shaveta Leekha
Reviewed-by: York Sun -
B4860 has two PLL per SerDes whereas B4420 has one PLL per SerDes,
add their defines in arch/powerpc/include/asm/config_mpc85xx.hSigned-off-by: Shaveta Leekha
Reviewed-by: York Sun -
On B4860 and B4420, some serdes protocols can be used with LC VCO as
well as Ring VCO options.Addded Alternate options with LC VCO for such protocols.
For example protocol 0x2a on srds 1 becomes 0x29 if it is LC VCO.The alternate option has the same functionality as the original option;
the only difference being LC VCO rather than Ring VCO.Signed-off-by: Poonam Aggrwal
Signed-off-by: Prabhakar Kushwaha
Reviewed-by: York Sun -
1) SerDes2 Refclks have been set properly to make
PCIe SATA to work as it work on SerDes refclk of 100MHz
2) Mask the SerDes's device reset request before changing
the Refclks for SerDes1 and SerDes2 for PLL locks to
happen properly, device reset request bit unmasked
after SerDes refclks configurationSigned-off-by: Shaveta Leekha
Reviewed-by: York Sun -
1) Add new SerDes1 protocols having Aurora in them
2) Add VSC cross point connections for Aurora to work with
CPRI and SGMIIs
3) Configure VSC crossbar switch to connect SerDes1
lanes to aurora on board, by checking SerDes1 protocols
4) SerDes1 Refclks have been set properly to make
Aurora, CPRI and SGMIIs to work together properlySigned-off-by: Shaveta Leekha
Reviewed-by: York Sun
07 Mar, 2014
17 commits
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"checkgcc4" is used only for PowerPC.
Move it to arch/powerpc/config.mk.To make sure gcc is new enough before beginning build,
run "checkgcc4" during "archprepare".Signed-off-by: Masahiro Yamada
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"checkthumb" makes sense only for ARM architecture.
Move it to arch/arm/config.mk.To make sure gcc supports THUMB mode before beginning build,
run "checkthumb" during "archprepare".Signed-off-by: Masahiro Yamada
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Before this commit, CONFIG_MPC8260 and CONFIG_8260
were used mixed-up.All boards with mpc8260 cpu defined both of them:
- CONFIG_MPC8260 was defined in board config headers
and include/common.h
- CONFIG_8260 was defined arch/powerpc/cpu/mpc8260/config.mkWe do not need to have both of them.
This commit keeps only CONFIG_MPC8260.This commit does:
- Delete CONFIG_8260 and CONFIG_MPC8260 definition
in config headers and include/common.h
- Rename CONFIG_8260 to CONFIG_MPC8260
in arch/powerpc/cpu/mpc8260/config.mk.
- Rename #ifdef CONFIG_8260 to #ifdef CONFIG_MPC8260Signed-off-by: Masahiro Yamada
Cc: Wolfgang Denk -
All mips32 boards define CONFIG_MIPS32 in config headers
except malta boards which define it in boards.cfg.
We can consolidate them by defining it in
arch/mips/cpu/mips32/config.mk.CONFIG_MIPS64 definition can be moved to
arch/mips/cpu/mips64/config.mk as well.Signed-off-by: Masahiro Yamada
Cc: Daniel Schwierzeck
Acked-by: Daniel Schwierzeck -
Kbuild brought about many advantages for us but a significant
performance regression was reported by Simon Glass.After some discussions and analysis, it turned out
its main cause is in $(call cc-option,...).Historically, U-Boot parses all config.mk
(arch/*/config.mk and board/*/config.mk)
every time descending into subdirectories.
That means cc-options are evaluated over and over again.$(call cc-option,...) is useful but costly.
So we want to evaluate them only in ./Makefile
and spl/Makefile and export compiler flags.This commit changes the build system as follows:
- Modify scripts/Makefile.build to not include config.mk
Instead, add $(PLATFORM_CPPFLAGS) to asflags-y, ccflags-y,
cppflags-y.- Export many variables
Going forward, Kbuild will not parse config.mk files
when it descends into subdirectories.
If we want to set variables in config.mk and use them
in subdirectories, they must be exported.This is the list of variables to get exported:
PLATFORM_CPPFLAGS
CPUDIR
BOARDDIR
OBJCOPYFLAGS
LDFLAGS
LDFLAGS_FINAL
(used in nand_spl/board/*/*/Makefile)
CONFIG_STANDALONE_LOAD_ADDR
(used in examples/standalone/Makefile)
SYM_PREFIX
(used in examples/standalone/Makefile)
RELFLAGS
(used in examples/standalone/Makefile)- Delete CPPFLAGS
This variable has been replaced with PLATFORM_CPPFLAGS- Copy gcclibdir from example/standalone/Makefile
to arch/sparc/config.mk
The reference in CONFIG_STANDALONE_LOAD_ADDR must be
resolved before it is exported.Signed-off-by: Masahiro Yamada
Reported-by: Simon Glass
Acked-by: Simon Glass
Tested-by: Simon Glass [on Sandbox]
Tested-by: Stephen Warren [on Tegra] -
We want to change the build system to include config.mk
only from ./Makefile and spl/Makefile.
We must prepare for that in this commit.$(src) is a moving target and not handy for our purpose.
We must replace it with a fixed path.Signed-off-by: Masahiro Yamada
-
Before this commit, USE_PRIVATE_LIBGCC was defined in
arch-specific config.mk and referenced in
arch/$(ARCH)/lib/Makefile.We are not happy about parsing config.mk again and again.
We have to keep the same behavior with a different way.By adding "CONFIG_" prefix, this macro appears
in include/autoconf.mk, include/spl-autoconf.mk.
(And treating USE_PRIVATE_LIBGCC as CONFIG macro
is reasonable enough.)Tegra SoC family defined USE_PRIVATE_LIBGCC as "yes"
in arch/arm/cpu/arm720t/tegra*/config.mk,
whereas did not define it in arch/arm/cpu/armv7/tegra*/config.mk.It means Tegra enables PRIVATE_LIBGCC only for SPL.
We can describe the same behavior by adding#ifdef CONFIG_SPL_BUILD
# define CONFIG_USE_PRIVATE_LIBGCC
#endifto include/configs/tegra-common.h.
Signed-off-by: Masahiro Yamada
Cc: Tom Warren
Cc: Simon Glass
Acked-by: Stephen Warren -
Many (but not all) of Blackfin boards give -O2 option
to compile under lib/ directory.
That means lib/ should be speed-optimized,
whereas other parts should be size-optimized.We want to keep the same behavior,
but do not want to parse board/*/config.mk again and again.
We've got no choice but to invent a new method.CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED, if it is enabled,
gives -O2 flag only for building under lib/ directory.Dirty codes which I had marked as "FIX ME"
in board/${BOARD}/config.mk have been deleted.
Instead, CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED has been
defined in include/configs/${BOARD}.h.Signed-off-by: Masahiro Yamada
Cc: Sonic Zhang -
When importing a checksummed area we need to be told how big the area in
question is so that we know that will match the size of the area which
the checksum is generated against.Reported-by: Pierre AUBERT
Signed-off-by: Tom Rini -
Signed-off-by: Vasili Galka
-
As ppc4xx currently only supports the deprecated nand_spl infrastructure
and nobody seems to have time / resources to port this over to the newer
SPL infrastructure, lets remove NAND booting completely.This should not affect the "normal", non NAND-booting ppc4xx platforms
that are currently supported.Signed-off-by: Stefan Roese
Cc: Wolfgang Denk
Cc: Tirumala Marri
Cc: Matthias Fuchs
Cc: Masahiro Yamada
Cc: Tom Rini
Tested-by: Matthias Fuchs -
There was wrong phy_mask for AR8021 device,
so the AR8021 can't be probed correctly.
Changed it from 0x4fffff to 0x4ffff0.Signed-off-by: Haijun Zhang
-
config.tmp is never generated
Signed-off-by: Masahiro Yamada
Cc: Michal Simek
Acked-by: Michal Simek -
The unit-test for hush's "test -e" currently relies upon being run in
the U-Boot build directory, because it tests for the existence of a file
that exists in that directory.Fix this by explicitly creating the file we use for the existence test,
and deleting it afterwards so that multiple successive unit-test
invocations succeed. This required adding an os.c function to erase
files.Reported-by: Simon Glass
Signed-off-by: Stephen Warren -
The following shell command fails:
if test -z "$x"; then echo "zero"; else echo "non-zero"; fi
(assuming $x does not exist, it prints "non-zero" rather than "zero").
... since "$x" expands to nothing, and the argument is completely
dropped, causing too few to be passed to -z, causing cmd_test() to
error out early.This is because when variable expansions are processed by make_string(),
the expanded results are concatenated back into a new string. However,
no quoting is applied when doing so, so any empty variables simply don't
generate any parameter when the combined string is parsed again.Fix this by explicitly replacing quoting any argument that was originally
quoted when re-generating a string from the already-parsed argument list.This also fixes loss of whitespace in commands such as:
setenv space " "
setenv var " 1${space}${space} 2 "
echo ">>${var}<
Acked-by: Simon Glass
Signed-off-by: Stephen Warren -
Delete the temporary variables that are used to save unit-test results
from the environment after running the test. This prevents polluting
the environment, or growing it too much.Signed-off-by: Stephen Warren
Acked-by: Simon Glass -
For Ethernet/USB RX packets, the ASIX HW pads odd-sized packets so that
they have an even size. Currently, asix_recv() does remove this padding,
and asic_send() adds equivalent padding in the TX path. However, the HW
does not appear to need this packing for TX packets in practical testing
with "ASIX Elec. Corp. AX88x72A 000001" Vendor: 0x0b95 Product 0x7720
Version 0.1. The Linux kernel does no such padding for the TX path.Remove the padding from the TX path:
* For consistency with the Linux kernel.
* NVIDIA has a Tegra simulator which validates that the length of USB
packets sent to an ASIX device matches the packet length value inside
the packet data. Having U-Boot and the kernel do the same thing when
creating the TX packets simplifies the simulator's validation.Cc: Lucas Stach
Cc: Marek Vasut
Cc: Simon Glass
Signed-off-by: Stephen Warren
Acked-by: Simon Glass
Acked-by: Marek Vasut
Tested-by: Marek Vasut
Tested-by: Gerhard Sittig
05 Mar, 2014
5 commits
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omap_elm.h is a generic header used by OMAP ELM driver for all TI platfoms.
Hence this file should be present in generic folder instead of architecture
specific include folder.
Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5Signed-off-by: Pekon Gupta
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omap_gpmc.h is a generic header used by OMAP NAND driver for all TI platfoms.
Hence this file should be present in generic folder instead of architecture
specific include folder.
Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5Signed-off-by: Pekon Gupta
-
Each SoC platform (AM33xx, OMAP3, OMAP4, OMAP5) has its own copy of GPMC related
defines and declarations scattered in SoC platform specific header files
like include/asm/arch-xx/cpu.h
However, GPMC hardware remains same across all platforms thus this patch merges
GPMC data scattered across different arch-xx specific header files into single
header file include/asm/arch/omap_gpmc.hBuild tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5
Signed-off-by: Pekon Gupta
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OMAP NAND driver can detect Page-size and OOB-size of NAND device from ONFI
params or nand_id[] table. And based on that it defines ECC layout.
This patch
1) removes following board configs used for defining NAND ECC layout
- GPMC_NAND_ECC_LP_x16_LAYOUT (for large page x16 NAND)
- GPMC_NAND_ECC_LP_x8_LAYOUT (for large page x8 NAND)
- GPMC_NAND_ECC_SP_x16_LAYOUT (for small page x16 NAND)
- GPMC_NAND_ECC_SP_x8_LAYOUT (for small page x8 NAND)2) removes unused #defines in common omap_gpmc.h depending on above configs
Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5
Signed-off-by: Pekon Gupta
