22 Apr, 2014
1 commit
18 Apr, 2014
3 commits
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k2hk EVM is based on Texas Instruments Keystone2 Hawking/Kepler
SoC. Keystone2 SoC has ARM v7 Cortex-A15 MPCore processor. Please
refer the ti/k2hk_evm/README for details on the board, build and other
information.This patch add support for keystone architecture and k2hk evm.
Signed-off-by: Vitaly Andrianov
Signed-off-by: Murali Karicheri
Signed-off-by: WingMan Kwok
Signed-off-by: Sandeep Nair -
Convert to using the common config files. This requires a little more
flexibility in the common files than we had been using before.Signed-off-by: Tom Rini
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We previously only supported QSPI_1 (single) support. Add QSPI_4 (quad)
read support as well. This means we can be given one of two boot device
values, but don't care which it is, so perform a fixup on the QSPI_4
value. We add a qspiboot build target to better show how you would use
QSPI as a boot device in deployment. When we boot from QSPI, we can
check the environment for 'boot_os' to control Falcon Mode.Signed-off-by: Sourav Poddar
Signed-off-by: Tom Rini
17 Apr, 2014
1 commit
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Jetson TK1 is an NVIDIA Tegra124 reference board, which shares much of
its design with Venice2.Signed-off-by: Stephen Warren
Signed-off-by: Tom Warren
25 Mar, 2014
1 commit
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Trivial merge conflict, needed to manually remove
local_info as per commit 41364f0f.Conflicts:
board/samsung/common/board.c
14 Mar, 2014
1 commit
12 Mar, 2014
1 commit
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Gateworks Ventana is a product family based on the i.MX6. This
patch adds support for all boards in the Ventana family. Where
possible, data from the boards EEPROM is used to determine various
details about the board at runtime.Signed-off-by: Tim Harvey
11 Mar, 2014
3 commits
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Some recent changes got parts of the file out of order again, correct.
Signed-off-by: Tom Rini
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When I cc board maintainers, some of them result in
bounce mails.It turned out the following do not work any more:
Yuli Barcohen
Travis Sawyer
Yusdi Santoso
David Updegraff
Sangmoon Kim
Anton Vorontsov
Blackfin Team
Bluetechnix Tinyboards
Andre SchwarzFor the blackfin boards where Sonic Zhang is also listed
as a maintainer, dead addresses should be simply dropped.For all of the others, the status should be changed to "Orphan".
We have adopted the definition of "Orphan" as:
board is not actively maintained any more but still builds, and any
address associated with it is that of the last known maintainer(s)Even though the emails do not work any more, they carry information.
We want to keep them.Besides, Orphan boards have been collected at the bottom of boards.cfg.
(This is done when we run "tools/reformat.py")Add separators to distinguish them from those which
were moved to Orphan 6 months ago.
I believe it will be helpful in future to find which boards are
old enough to be removed from the code base.Signed-off-by: Masahiro Yamada
Cc: Detlev Zundel
Cc: Tom Rini
Cc: Albert ARIBAUD
10 Mar, 2014
2 commits
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CONFIG_SYS_HZ must be always 1000, but M5271EVB.h defines it
as 1000000 and idmr.h defines it as (50000000 / 64).When compiling these two boards, a warning message is displayed:
time.c:14:2: warning: #warning "CONFIG_SYS_HZ must be 1000
and should not be defined by platforms" [-Wcpp]There are no board maintainers for them so this commit just
deletes them.Signed-off-by: Masahiro Yamada
Cc: Jason Jin -
Add sama5d3 Xplained board support which use Atmel SAMA5D36 SoC.
Now it supports boot from NAND flash and SD/MMC card.
Features support:
- NAND flash
- SD/MMC card
- Two USB hosts
- Ethernet (one GMAC, one EMAC)Signed-off-by: Bo Shen
[reorder boards.cfg]
Signed-off-by: Andreas Bießmann
08 Mar, 2014
2 commits
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T2080PCIe-RDB is a Freescale Reference Design Board that hosts the T2080 SoC.
It works in two mode: standalone mode and PCIe endpoint mode.T2080PCIe-RDB Feature Overview
------------------------------
Processor:
- T2080 SoC integrating four 64-bit dual-threads e6500 cores up to 1.8GHz
DDR Memory:
- Single memory controller capable of supporting DDR3 and DDR3-LP devices
- 72bit 4GB DDR3-LP SODIMM in slot
Ethernet interfaces:
- Two 10M/100M/1G RGMII ports on-board
- Two 10Gbps SFP+ ports on-board
- Two 10Gbps Base-T ports on-board
Accelerator:
- DPAA components consist of FMan, BMan, QMan, PME, DCE and SEC
SerDes 16 lanes configuration:
- SerDes-1 Lane A-B: to two 10G XFI fiber (MAC9 & MAC10)
- SerDes-1 Lane C-D: to two 10G Base-T (MAC1 & MAC2)
- SerDes-1 Lane E-H: to PCIe Goldfinger (PCIe4 x4, Gen3)
- SerDes-2 Lane A-D: to PCIe Slot (PCIe1 x4, Gen2)
- SerDes-2 Lane E-F: to C293 secure co-processor (PCIe2 x2)
- SerDes-2 Lane G-H: to SATA1 & SATA2
IFC/Local Bus:
- NOR: 128MB 16-bit NOR flash
- NAND: 512MB 8-bit NAND flash
- CPLD: for system controlling with programable header on-board
eSPI:
- 64MB N25Q512 SPI flash
USB:
- Two USB2.0 ports with internal PHY (both Type-A)
PCIe:
- One PCIe x4 gold-finger
- One PCIe x4 connector
- One PCIe x2 end-point device (C293 Crypto co-processor)
SATA:
- Two SATA 2.0 ports on-board
SDHC:
- support a TF-card on-board
I2C:
- Four I2C controllers.
UART:
- Dual 4-pins UART serial portsSigned-off-by: Shengzhou Liu
Reviewed-by: York Sun
07 Mar, 2014
2 commits
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All mips32 boards define CONFIG_MIPS32 in config headers
except malta boards which define it in boards.cfg.
We can consolidate them by defining it in
arch/mips/cpu/mips32/config.mk.CONFIG_MIPS64 definition can be moved to
arch/mips/cpu/mips64/config.mk as well.Signed-off-by: Masahiro Yamada
Cc: Daniel Schwierzeck
Acked-by: Daniel Schwierzeck -
As ppc4xx currently only supports the deprecated nand_spl infrastructure
and nobody seems to have time / resources to port this over to the newer
SPL infrastructure, lets remove NAND booting completely.This should not affect the "normal", non NAND-booting ppc4xx platforms
that are currently supported.Signed-off-by: Stefan Roese
Cc: Wolfgang Denk
Cc: Tirumala Marri
Cc: Matthias Fuchs
Cc: Masahiro Yamada
Cc: Tom Rini
Tested-by: Matthias Fuchs
05 Mar, 2014
1 commit
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There are no source files in board/synopsys/arcangel4/
directory.Signed-off-by: Masahiro Yamada
Cc: Alexey Brodkin
27 Feb, 2014
1 commit
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Conflicts:
arch/arm/cpu/armv7/config.mk
board/ti/am43xx/mux.c
include/configs/am43xx_evm.hSigned-off-by: Tom Rini
26 Feb, 2014
1 commit
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With this, fixup a trivial build error of get_effective_memsize needing
to be updated in the new board/freescale/p1010rdb/spl.cSigned-off-by: Tom Rini
25 Feb, 2014
1 commit
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T2081 QDS is a high-performance computing evaluation, development and
test platform supporting the T2081 QorIQ Power Architecture processor.T2081QDS board Overview
-----------------------
- T2081 SoC integrating four 64-bit dual-threads e6500 cores up to 1.8GHz
- 2MB shared L2 and 512KB L3 CoreNet platform cache (CPC)
- CoreNet fabric supporting coherent and noncoherent transactions with
prioritization and bandwidth allocation
- 32-/64-bit DDR3/DDR3LP SDRAM memory controller with ECC and interleaving
- Ethernet interfaces:
- Two on-board 10M/100M/1G bps RGMII ports
- Two 10Gbps XFI with on-board SFP+ cage
- 1Gbps/2.5Gbps SGMII Riser card
- 10Gbps XAUI Riser card
- Accelerator:
- DPAA components consist of FMan, BMan, QMan, PME, DCE and SEC
- SerDes:
- 8 lanes up to 10.3125GHz
- Supports SGMII, HiGig, XFI, XAUI and Aurora debug,
- IFC:
- 512MB NOR Flash, 2GB NAND Flash, PromJet debug port and Qixis FPGA
- eSPI:
- Three SPI flash (16MB N25Q128A + 16MB EN25S64 + 512KB SST25WF040)
- USB:
- Two USB2.0 ports with internal PHY (one Type-A + one micro Type mini-AB)
- PCIe:
- Four PCI Express controllers (two PCIe 2.0 and two PCIe 3.0 with SR-IOV)
- eSDHC:
- Supports various SD/SDHC/SDXC/eMMC devices with adapter cards and
voltage translators
- I2C:
- Four I2C controllers.
- UART:
- Dual 4-pins UART serial portsSigned-off-by: Shengzhou Liu
Reviewed-by: York Sun
24 Feb, 2014
2 commits
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Run "tools/reformat.py -i -d '-' -s 8 boards0.cfg && mv boards0.cfg boards.cfg"
in order to keep arc entries sorted.Signed-off-by: Fabio Estevam
23 Feb, 2014
1 commit
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Add support for the bcm28155_ap reference board.
Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
Reviewed-by: Tim Kryger
22 Feb, 2014
5 commits
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Adds support for Bernecker & Rainer Industrieelektronik GmbH KWB
Motherboard, using TI's AM3352 SoC.Most of code is derived from TI's AM335x_EVM
Signed-off-by: Hannes Petermaier
Cc: trini@ti.com -
Adds support for Bernecker & Rainer Industrieelektronik GmbH T-Series
Motherboard, using TI's AM3352 SoC.Most of code is derived from TI's AM335x_EVM
Signed-off-by: Hannes Petermaier
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This patch add support for the Silica Pengwyn board [1]
The board is based on a TI AM3354 CPU [2]
All jumpers removed it will boot from the SDcard, the console is on
UART1 accessible via the FDTI -> USB. The on board NAND flash is
supported and can act as boot medium, depending on jumper settings.
USB Host, USB Device and Ethernet are also provided but untested.[1]
http://www.silica.com/product/silica-pengwyn-board.html
[2]
http://www.ti.com/product/am3354Signed-off-by: Lothar Felten
[trini: Move CONFIG_BOARD_LATE_INIT into am335x_evm.h, drop unused
spi0_pin_mux from Pengwyn support]
Signed-off-by: Tom Rini -
There are some entries which produce the same binaries:
- ep8248E is equivalent to ep8248
- MPC8360ERDK_66 is equivalent to MPC8360ERDK
- Adder87x/AdderUSB is equivalent to Adder
- EVB64260_750CX is equivalent to EVB64260I also notice
- Lite5200 is equivalent to icecube_5200
- Lite5200_LOWBOOT is equivalent to icecube_5200_LOWBOOT
- Lite5200_LOWBOOT08 is equivalent to icecube_5200_LOWBOOT08
But I am keeping them.
(Wolfgang suggested to do so because Lite5200* are referenced
in misc documents.)Signed-off-by: Masahiro Yamada
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The 8th field of boards.cfg takes the form:
[:comma separated config options]We should describe explicitely the 8th field only when it is necessary
to do so.
Specify "-" in the 8th field if it is the same as 7th field.Signed-off-by: Masahiro Yamada
Acked-by: Otavio Salvador
19 Feb, 2014
1 commit
18 Feb, 2014
1 commit
14 Feb, 2014
1 commit
-
KMSUGP1 is from a u-boot perspective (almost) identical to KMNUSA.
The only difference is that the PCIe reset is connected to Kirkwood pin
MPP7_PEX_RST_OUTn, we use a dedicated config flag KM_PCIE_RESET_MPP7.
Such pin should theoretically be handled by the PCIe subsystem
automatically, but this turned out not to be the case.
So simply configure this PIN as a GPIO and issue a pulse manually.Signed-off-by: Gerlando Falauto
Cc: Karlheinz Jerg
Cc: Valentin Longchamp
Cc: Holger Brunck
Acked-by: Valentin Longchamp
07 Feb, 2014
2 commits
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AXS101 is a new generation of devlopment boards from Synopsys that houses
ASIC with ARC700 and lots of DesignWare peripherals:* DW APB UART
* DW Mobile Storage (MMC/SD)
* DW I2C
* DW GMACSigned-off-by: Alexey Brodkin
Cc: Vineet Gupta
Cc: Francois Bedard
Cc: Wolfgang Denk
Cc: Heiko Schocher -
Arcangel4 is a FPGA-based development board that is used for prototyping and
verificationof of both ARC hardware (CPUs) and software running upon CPU.This board avaialble in 2 flavours:
* Little-endian (arcangel4)
* Big-endian (arcangel4-be)Signed-off-by: Alexey Brodkin
Cc: Vineet Gupta
Cc: Francois Bedard
Cc: Wolfgang Denk
Cc: Heiko Schocher
06 Feb, 2014
5 commits
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The board is unmaintained, just like the rest of the IXP.
Signed-off-by: Marek Vasut
Cc: Albert Aribaud
Cc: Michael Schwingen
Cc: Tom Rini -
The board is unmaintained, just like the rest of the IXP.
Signed-off-by: Marek Vasut
Cc: Albert Aribaud
Cc: Michael Schwingen
Cc: Tom Rini -
The board is unmaintained, just like the rest of the IXP.
Signed-off-by: Marek Vasut
Cc: Albert Aribaud
Cc: Michael Schwingen
Cc: Tom Rini -
The board is unmaintained, just like the rest of the IXP.
Signed-off-by: Marek Vasut
Cc: Albert Aribaud
Cc: Michael Schwingen
Cc: Tom Rini -
The board is unmaintained, just like the rest of the IXP.
Signed-off-by: Marek Vasut
Cc: Albert Aribaud
Cc: Michael Schwingen
Cc: Tom Rini
04 Feb, 2014
1 commit
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These are the board files for Venice2 (Tegra124), plus the AS3722 PMIC
files. PMIC init will be moved to pmic_common_init later.This builds/boots on Venice2, SPI/MMC/USB/I2C all work. Audio, display
and WB/LP0 are not supported yet.Signed-off-by: Tom Warren
Signed-off-by: Stephen Warren
Tested-by: Thierry Reding
Signed-off-by: Tom Warren
