07 Apr, 2014

2 commits


04 Apr, 2014

1 commit


01 Apr, 2014

3 commits

  • The DRAM size can be easily detected at runtime on i.MX53. Implement
    such detection on M53EVK and adjust the rest of the macros accordingly
    to use the detected values.

    An important thing to note here is that we had to override the function
    for trimming the effective DRAM address, get_effective_memsize(). That
    is because the function uses CONFIG_MAX_MEM_MAPPED as the upper bound of
    the available DRAM and we don't have gd->bd->bi_dram[0].size set up at
    the time the function is called, thus we cannot put this into the macro
    CONFIG_MAX_MEM_MAPPED . Instead, we use custom override where we use the
    size of the first DRAM block which we just detected.

    Signed-off-by: Marek Vasut
    Cc: Fabio Estevam
    Cc: Stefano Babic
    Cc: Wolfgang Denk

    Marek Vasut
     
  • The DRAM size can be easily detected at runtime on i.MX53. Implement
    such detection on MX53QSB and adjust the rest of the macros accordingly
    to use the detected values.

    An important thing to note here is that we had to override the function
    for trimming the effective DRAM address, get_effective_memsize(). That
    is because the function uses CONFIG_MAX_MEM_MAPPED as the upper bound of
    the available DRAM and we don't have gd->bd->bi_dram[0].size set up at
    the time the function is called, thus we cannot put this into the macro
    CONFIG_MAX_MEM_MAPPED . Instead, we use custom override where we use the
    size of the first DRAM block which we just detected.

    Signed-off-by: Marek Vasut
    Cc: Fabio Estevam
    Cc: Stefano Babic
    Cc: Wolfgang Denk

    Marek Vasut
     
  • Add support for PCIe on MX6 SabreSDP board and enable the support
    in the config file.

    Signed-off-by: Marek Vasut
    Cc: Stefano Babic
    Cc: Fabio Estevam
    Cc: Liu Ying

    Marek Vasut
     

27 Mar, 2014

1 commit

  • I2C protocol requires open-drain IOs. Fix the Dalmore and Venice2 pinmux
    tables to configure the IOs correctly. Without this, Tegra may actively
    drive the lines high while an external device is actively driving the
    lines low, which can only lead to bad things.

    Signed-off-by: Stephen Warren
    Acked-by: Simon Glass
    Signed-off-by: Tom Warren

    Stephen Warren
     

25 Mar, 2014

1 commit


18 Mar, 2014

3 commits


14 Mar, 2014

3 commits


13 Mar, 2014

5 commits


12 Mar, 2014

9 commits


11 Mar, 2014

4 commits


10 Mar, 2014

5 commits

  • CONFIG_SYS_HZ must be always 1000, but M5271EVB.h defines it
    as 1000000 and idmr.h defines it as (50000000 / 64).

    When compiling these two boards, a warning message is displayed:

    time.c:14:2: warning: #warning "CONFIG_SYS_HZ must be 1000
    and should not be defined by platforms" [-Wcpp]

    There are no board maintainers for them so this commit just
    deletes them.

    Signed-off-by: Masahiro Yamada
    Cc: Jason Jin

    Masahiro Yamada
     
  • Add NAND SPL boot support with hardware PMECC.

    Signed-off-by: Bo Shen
    Signed-off-by: Andreas Bießmann

    Bo Shen
     
  • Add SPI SPL boot support for sama5d3xek board.

    Signed-off-by: Bo Shen
    Signed-off-by: Andreas Bießmann

    Bo Shen
     
  • Add sama5d3 Xplained board support which use Atmel SAMA5D36 SoC.
    Now it supports boot from NAND flash and SD/MMC card.
    Features support:
    - NAND flash
    - SD/MMC card
    - Two USB hosts
    - Ethernet (one GMAC, one EMAC)

    Signed-off-by: Bo Shen
    [reorder boards.cfg]
    Signed-off-by: Andreas Bießmann

    Bo Shen
     
  • Add support for using the Atmel MCI driver on at91sam9263ek.
    This change is modeled after the existing at91sam9260ek support.

    Please note that this hooks up slot1 (MCI1) for SD. Not both.

    Tested with at91bootstrap and u-boot on dataflash in slot 0
    and fat-formatted 8GB SDHC in slot 1 on first revision
    at91sam9263ek (which must use dataflash in slot0 to boot).

    CONFIG_ATMEL_MCI_PORTB not tested.

    Signed-off-by: Andreas Henriksson
    [remove empty line]
    Signed-off-by: Andreas Bießmann

    Andreas Henriksson
     

08 Mar, 2014

3 commits

  • Tom Rini
     
  • Update following DDR related settings for T1040RDB, T1042RDB_PI
    -Correct number of chip selects to two as t1040 supports
    two Chip selects.
    -Update board_specific_parameters udimm structure with settings
    derived via calibration.
    -Update ddr_raw_timing sructure corresponding to DIMM.
    -Set ODT to off. Typically on FSL board, ODT is set to 75 ohm,
    but on T104xRDB, on setting this , DDR instability is observed.
    Board-level debugging is in progress.

    Verified the updated settings to be working fine with dual-ranked
    Micron, MT18KSF51272AZ-1G6 DIMM at data rate 1600MT/s.

    Signed-off-by: Priyanka Jain
    Signed-off-by: York Sun

    Priyanka Jain
     
  • T1040 has internal display interface unit (DIU) for driving video.
    T1040QDS supports video mode via
    -LCD using TI enconder
    -HDMI type interface via HDMI encoder

    Chrontel, CH7301C encoder which is I2C programmable is used as
    HDMI connector on T1040QDS.
    This patch add support to
    -enable Video interface for T1040QDS
    -route qixis multiplexing to enable DIU-HDMI interface on board
    -program DIU pixel clock gerenartor for T1040
    -program HDMI encoder via I2C on board

    Signed-off-by: Priyanka Jain
    Reviewed-by: York Sun

    Priyanka Jain