11 Mar, 2014
1 commit
10 Mar, 2014
2 commits
-
CONFIG_SYS_HZ must be always 1000, but M5271EVB.h defines it
as 1000000 and idmr.h defines it as (50000000 / 64).When compiling these two boards, a warning message is displayed:
time.c:14:2: warning: #warning "CONFIG_SYS_HZ must be 1000
and should not be defined by platforms" [-Wcpp]There are no board maintainers for them so this commit just
deletes them.Signed-off-by: Masahiro Yamada
Cc: Jason Jin -
Add sama5d3 Xplained board support which use Atmel SAMA5D36 SoC.
Now it supports boot from NAND flash and SD/MMC card.
Features support:
- NAND flash
- SD/MMC card
- Two USB hosts
- Ethernet (one GMAC, one EMAC)Signed-off-by: Bo Shen
[reorder boards.cfg]
Signed-off-by: Andreas Bießmann
08 Mar, 2014
2 commits
-
T2080PCIe-RDB is a Freescale Reference Design Board that hosts the T2080 SoC.
It works in two mode: standalone mode and PCIe endpoint mode.T2080PCIe-RDB Feature Overview
------------------------------
Processor:
- T2080 SoC integrating four 64-bit dual-threads e6500 cores up to 1.8GHz
DDR Memory:
- Single memory controller capable of supporting DDR3 and DDR3-LP devices
- 72bit 4GB DDR3-LP SODIMM in slot
Ethernet interfaces:
- Two 10M/100M/1G RGMII ports on-board
- Two 10Gbps SFP+ ports on-board
- Two 10Gbps Base-T ports on-board
Accelerator:
- DPAA components consist of FMan, BMan, QMan, PME, DCE and SEC
SerDes 16 lanes configuration:
- SerDes-1 Lane A-B: to two 10G XFI fiber (MAC9 & MAC10)
- SerDes-1 Lane C-D: to two 10G Base-T (MAC1 & MAC2)
- SerDes-1 Lane E-H: to PCIe Goldfinger (PCIe4 x4, Gen3)
- SerDes-2 Lane A-D: to PCIe Slot (PCIe1 x4, Gen2)
- SerDes-2 Lane E-F: to C293 secure co-processor (PCIe2 x2)
- SerDes-2 Lane G-H: to SATA1 & SATA2
IFC/Local Bus:
- NOR: 128MB 16-bit NOR flash
- NAND: 512MB 8-bit NAND flash
- CPLD: for system controlling with programable header on-board
eSPI:
- 64MB N25Q512 SPI flash
USB:
- Two USB2.0 ports with internal PHY (both Type-A)
PCIe:
- One PCIe x4 gold-finger
- One PCIe x4 connector
- One PCIe x2 end-point device (C293 Crypto co-processor)
SATA:
- Two SATA 2.0 ports on-board
SDHC:
- support a TF-card on-board
I2C:
- Four I2C controllers.
UART:
- Dual 4-pins UART serial portsSigned-off-by: Shengzhou Liu
Reviewed-by: York Sun
07 Mar, 2014
2 commits
-
All mips32 boards define CONFIG_MIPS32 in config headers
except malta boards which define it in boards.cfg.
We can consolidate them by defining it in
arch/mips/cpu/mips32/config.mk.CONFIG_MIPS64 definition can be moved to
arch/mips/cpu/mips64/config.mk as well.Signed-off-by: Masahiro Yamada
Cc: Daniel Schwierzeck
Acked-by: Daniel Schwierzeck -
As ppc4xx currently only supports the deprecated nand_spl infrastructure
and nobody seems to have time / resources to port this over to the newer
SPL infrastructure, lets remove NAND booting completely.This should not affect the "normal", non NAND-booting ppc4xx platforms
that are currently supported.Signed-off-by: Stefan Roese
Cc: Wolfgang Denk
Cc: Tirumala Marri
Cc: Matthias Fuchs
Cc: Masahiro Yamada
Cc: Tom Rini
Tested-by: Matthias Fuchs
05 Mar, 2014
1 commit
-
There are no source files in board/synopsys/arcangel4/
directory.Signed-off-by: Masahiro Yamada
Cc: Alexey Brodkin
27 Feb, 2014
1 commit
-
Conflicts:
arch/arm/cpu/armv7/config.mk
board/ti/am43xx/mux.c
include/configs/am43xx_evm.hSigned-off-by: Tom Rini
26 Feb, 2014
1 commit
-
With this, fixup a trivial build error of get_effective_memsize needing
to be updated in the new board/freescale/p1010rdb/spl.cSigned-off-by: Tom Rini
25 Feb, 2014
1 commit
-
T2081 QDS is a high-performance computing evaluation, development and
test platform supporting the T2081 QorIQ Power Architecture processor.T2081QDS board Overview
-----------------------
- T2081 SoC integrating four 64-bit dual-threads e6500 cores up to 1.8GHz
- 2MB shared L2 and 512KB L3 CoreNet platform cache (CPC)
- CoreNet fabric supporting coherent and noncoherent transactions with
prioritization and bandwidth allocation
- 32-/64-bit DDR3/DDR3LP SDRAM memory controller with ECC and interleaving
- Ethernet interfaces:
- Two on-board 10M/100M/1G bps RGMII ports
- Two 10Gbps XFI with on-board SFP+ cage
- 1Gbps/2.5Gbps SGMII Riser card
- 10Gbps XAUI Riser card
- Accelerator:
- DPAA components consist of FMan, BMan, QMan, PME, DCE and SEC
- SerDes:
- 8 lanes up to 10.3125GHz
- Supports SGMII, HiGig, XFI, XAUI and Aurora debug,
- IFC:
- 512MB NOR Flash, 2GB NAND Flash, PromJet debug port and Qixis FPGA
- eSPI:
- Three SPI flash (16MB N25Q128A + 16MB EN25S64 + 512KB SST25WF040)
- USB:
- Two USB2.0 ports with internal PHY (one Type-A + one micro Type mini-AB)
- PCIe:
- Four PCI Express controllers (two PCIe 2.0 and two PCIe 3.0 with SR-IOV)
- eSDHC:
- Supports various SD/SDHC/SDXC/eMMC devices with adapter cards and
voltage translators
- I2C:
- Four I2C controllers.
- UART:
- Dual 4-pins UART serial portsSigned-off-by: Shengzhou Liu
Reviewed-by: York Sun
24 Feb, 2014
2 commits
-
Run "tools/reformat.py -i -d '-' -s 8 boards0.cfg && mv boards0.cfg boards.cfg"
in order to keep arc entries sorted.Signed-off-by: Fabio Estevam
23 Feb, 2014
1 commit
-
Add support for the bcm28155_ap reference board.
Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
Reviewed-by: Tim Kryger
22 Feb, 2014
5 commits
-
Adds support for Bernecker & Rainer Industrieelektronik GmbH KWB
Motherboard, using TI's AM3352 SoC.Most of code is derived from TI's AM335x_EVM
Signed-off-by: Hannes Petermaier
Cc: trini@ti.com -
Adds support for Bernecker & Rainer Industrieelektronik GmbH T-Series
Motherboard, using TI's AM3352 SoC.Most of code is derived from TI's AM335x_EVM
Signed-off-by: Hannes Petermaier
-
This patch add support for the Silica Pengwyn board [1]
The board is based on a TI AM3354 CPU [2]
All jumpers removed it will boot from the SDcard, the console is on
UART1 accessible via the FDTI -> USB. The on board NAND flash is
supported and can act as boot medium, depending on jumper settings.
USB Host, USB Device and Ethernet are also provided but untested.[1]
http://www.silica.com/product/silica-pengwyn-board.html
[2]
http://www.ti.com/product/am3354Signed-off-by: Lothar Felten
[trini: Move CONFIG_BOARD_LATE_INIT into am335x_evm.h, drop unused
spi0_pin_mux from Pengwyn support]
Signed-off-by: Tom Rini -
There are some entries which produce the same binaries:
- ep8248E is equivalent to ep8248
- MPC8360ERDK_66 is equivalent to MPC8360ERDK
- Adder87x/AdderUSB is equivalent to Adder
- EVB64260_750CX is equivalent to EVB64260I also notice
- Lite5200 is equivalent to icecube_5200
- Lite5200_LOWBOOT is equivalent to icecube_5200_LOWBOOT
- Lite5200_LOWBOOT08 is equivalent to icecube_5200_LOWBOOT08
But I am keeping them.
(Wolfgang suggested to do so because Lite5200* are referenced
in misc documents.)Signed-off-by: Masahiro Yamada
-
The 8th field of boards.cfg takes the form:
[:comma separated config options]We should describe explicitely the 8th field only when it is necessary
to do so.
Specify "-" in the 8th field if it is the same as 7th field.Signed-off-by: Masahiro Yamada
Acked-by: Otavio Salvador
19 Feb, 2014
1 commit
18 Feb, 2014
1 commit
14 Feb, 2014
1 commit
-
KMSUGP1 is from a u-boot perspective (almost) identical to KMNUSA.
The only difference is that the PCIe reset is connected to Kirkwood pin
MPP7_PEX_RST_OUTn, we use a dedicated config flag KM_PCIE_RESET_MPP7.
Such pin should theoretically be handled by the PCIe subsystem
automatically, but this turned out not to be the case.
So simply configure this PIN as a GPIO and issue a pulse manually.Signed-off-by: Gerlando Falauto
Cc: Karlheinz Jerg
Cc: Valentin Longchamp
Cc: Holger Brunck
Acked-by: Valentin Longchamp
07 Feb, 2014
2 commits
-
AXS101 is a new generation of devlopment boards from Synopsys that houses
ASIC with ARC700 and lots of DesignWare peripherals:* DW APB UART
* DW Mobile Storage (MMC/SD)
* DW I2C
* DW GMACSigned-off-by: Alexey Brodkin
Cc: Vineet Gupta
Cc: Francois Bedard
Cc: Wolfgang Denk
Cc: Heiko Schocher -
Arcangel4 is a FPGA-based development board that is used for prototyping and
verificationof of both ARC hardware (CPUs) and software running upon CPU.This board avaialble in 2 flavours:
* Little-endian (arcangel4)
* Big-endian (arcangel4-be)Signed-off-by: Alexey Brodkin
Cc: Vineet Gupta
Cc: Francois Bedard
Cc: Wolfgang Denk
Cc: Heiko Schocher
06 Feb, 2014
5 commits
-
The board is unmaintained, just like the rest of the IXP.
Signed-off-by: Marek Vasut
Cc: Albert Aribaud
Cc: Michael Schwingen
Cc: Tom Rini -
The board is unmaintained, just like the rest of the IXP.
Signed-off-by: Marek Vasut
Cc: Albert Aribaud
Cc: Michael Schwingen
Cc: Tom Rini -
The board is unmaintained, just like the rest of the IXP.
Signed-off-by: Marek Vasut
Cc: Albert Aribaud
Cc: Michael Schwingen
Cc: Tom Rini -
The board is unmaintained, just like the rest of the IXP.
Signed-off-by: Marek Vasut
Cc: Albert Aribaud
Cc: Michael Schwingen
Cc: Tom Rini -
The board is unmaintained, just like the rest of the IXP.
Signed-off-by: Marek Vasut
Cc: Albert Aribaud
Cc: Michael Schwingen
Cc: Tom Rini
04 Feb, 2014
2 commits
-
These are the board files for Venice2 (Tegra124), plus the AS3722 PMIC
files. PMIC init will be moved to pmic_common_init later.This builds/boots on Venice2, SPI/MMC/USB/I2C all work. Audio, display
and WB/LP0 are not supported yet.Signed-off-by: Tom Warren
Signed-off-by: Stephen Warren
Tested-by: Thierry Reding
Signed-off-by: Tom Warren -
The kmcoge4 board is the product board derived from the kmlion1
prototype. The main difference between the 2 boards is that the kmcoge4
does not configure the Local Bus controller for LCS2.Signed-off-by: Valentin Longchamp
[York Sun: Minor change to boards.cfg to keep targets in order]
Signed-off-by: York Sun
27 Jan, 2014
1 commit
-
Run "tools/reformat.py -i -d '-' -s 8 boards0.cfg && mv boards0.cfg boards.cfg"
in order to keep the entries sorted.Signed-off-by: Fabio Estevam
22 Jan, 2014
2 commits
-
u-boot binary size for Freescale mpc85xx platforms is 512KB.
This has been reached to upper limit for some of the platforms causig
linker error.So, Increase the u-boot binary size to 768KB.
Signed-off-by: York Sun
Signed-off-by: Prabhakar Kushwaha -
Using the TPL/SPL method to booting from 8k page NAND flash.
- Add 256kB size SRAM tlb for second step booting;
- Add spl.c for TPL image boot;
- Add spl_minimal.c for minimal SPL image;
- Add C29XPCIE_NAND configure;
- Modify C29XPCIE.h for nand config and enviroment;Signed-off-by: Po Liu
Reviewed-by: York Sun
15 Jan, 2014
2 commits
-
SolidRun has designed the Hummingboard board based on mx6q/dl/solo.
Add the initial support for the mx6 solo variant.
More information about this hardware can be found at:
http://imx.solid-run.com/wiki/index.php?title=Carrier-One_Hardware(Carrier-One was the previous name of Hummingboard).
Based on the work from Jon Nettleton .
Signed-off-by: Jon Nettleton
Signed-off-by: Fabio Estevam
14 Jan, 2014
2 commits
-
Signed-off-by: Albert ARIBAUD
Acked-by: Stefano Babic -
Signed-off-by: Albert ARIBAUD
Acked-by: Minkyu Kang
10 Jan, 2014
2 commits
-
Bringing in the MMC tree means that CONFIG_BOUNCE_BUFFER needed to be
added to include/configs/exynos5-dt.h now.Conflicts:
include/configs/exynos5250-dt.hSigned-off-by: Tom Rini
-
ZC770 is a complete development board based on the Xilinx Zynq-7000
All Programmable SoC, similar to ZC70x board but which has four
different daughter cards, like XM010, XM011, XM012 and XM013ZC770 XM012:
- 1GB DDR3
- 64MiB Numonyx NOR flash
- USB-UARTSigned-off-by: Jagannadha Sutradharudu Teki
Cc: Stefan Roese
