21 Oct, 2014
4 commits
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Declare displays[] and display_count in imx-common/video.h to
prevent "Should it be static?" messages when compiling board
files with "make C=1".Signed-off-by: Eric Nelson
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Provide a public declaration of the board_spi_cs_gpio()
callback for i.MX SPI chip selects to prevent the warning
"Should it be static?" when compiling with "make C=1".Signed-off-by: Eric Nelson
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Include to see the prototype for get_board_rev()
and prevent warning "Should it be static?" with "make C=1".Signed-off-by: Eric Nelson
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Without preceding declarations, "make C=1" generates
"Should it be static?" warnings for symbols
do_bootm_linux,
boot_prep_vxworks, and
boot_jump_vxworksInclude of bootm.h also identified a signature mismatch
(const on argv[]).Signed-off-by: Eric Nelson
Acked-by: Albert ARIBAUD
11 Oct, 2014
1 commit
10 Oct, 2014
9 commits
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These boards have been orphaned for more than 6 months.
Signed-off-by: Masahiro Yamada
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These boards have been orphaned for more than 6 months.
Signed-off-by: Masahiro Yamada
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This board has been orphaned for more than 6 months.
It is the last board defining CONFIG_APM821XX.
The code inside #ifdef CONFIG_APM821XX should be removed too.Signed-off-by: Masahiro Yamada
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This board has been orphaned for more than 6 months.
Signed-off-by: Masahiro Yamada
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These boards have been orphaned for more than 6 months.
Signed-off-by: Masahiro Yamada
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The definitions for div ratio supposed to be in hex and were added
in dec by mistake.Signed-off-by: Ivan Khoronzhuk
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scsi_scan() must be called as part of scsi_init() and not
as part of sata_init().Signed-off-by: Roger Quadros
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On OMAP platforms, SATA controller provides the SCSI subsystem
so implement scsi_init().Get rid of the unnecessary sata_init() call from dra7xx-evm
and omap5-uevm board files.Signed-off-by: Roger Quadros
09 Oct, 2014
4 commits
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rmobile/lowlevel_init_ca15.S are common in r8a7790, r8a7791 and r8a7794 of
rmobile SoCs. The initialize L2 cache in lowlevel_init_ca15.S only needed
for Cortex-A15. The r8a7794 is Cortex-A7, not Cortex-A15.
This adds Skip to initialize L2 cache when r8a7794.Signed-off-by: Nobuhiro Iwamatsu
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rmobile/lowlevel_init_ca15.S are common in r8a7790 and r8a7791 of
rmobile SoC. But L2 cache of r8a7791 does not use L2CTLR[5].
This adds fix to set L2CTLR [5] only when the r8a7790.Signed-off-by: Nobuhiro Iwamatsu
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This removes duplicate initialization of l2ctlr.
Signed-off-by: Nobuhiro Iwamatsu
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The single file conflict below is actually trivial.
Conflicts:
board/boundary/nitrogen6x/nitrogen6x.c
08 Oct, 2014
6 commits
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Move cache handling code to C file, and add enable_caches() and
disable_caches() functions.Signed-off-by: Robert Baldyga
Signed-off-by: Minkyu Kang -
Change this board to add a device tree.
Signed-off-by: Simon Glass
Signed-off-by: Minkyu Kang -
Change this board to add a device tree.
This also adds a pinmux header file although it is not used as yet.
Signed-off-by: Simon Glass
Signed-off-by: Minkyu Kang -
Most of the smdkv310 features are common with other exynos4 boards. To
permit easier addition of driver model support, use the common file and
add a device tree file.Signed-off-by: Simon Glass
Signed-off-by: Minkyu Kang -
Add a keyboard definition so that the keyboard can be used on pit.
Signed-off-by: Simon Glass
Signed-off-by: Minkyu Kang -
The device seems to hang in SPL if the full speed is used when booting from
USB, perhaps because the PMIC has not been set to the maximum ARM core
voltage yet. Slow it down to a reliable speed.Signed-off-by: Simon Glass
Signed-off-by: Minkyu Kang
07 Oct, 2014
2 commits
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Removed settings in unsupported register fields. They didn’t
do anything, and in most cases, were not documented in the
reference manual.Changed register settings to comply with JEDEC required values.
Changed timing parameters because they included full clock
periods that were doing nothing.Signed-off-by: Anthony Felice
[rebased on v2014.10-rc2]
Signed-off-by: Stefan Agner
06 Oct, 2014
14 commits
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Add command to enable and disable the bridges between HPS and FPGA.
This patch does have a checkpatch issue with the assembler portion,
checkpatch correctly complains that there should be no whitespace
before quoted newline. I do not agree that fixing this specific
checkpatch issue will improve the readability, thus this one is not
addressed.Signed-off-by: Marek Vasut
Cc: Dinh Nguyen
Cc: Pavel Machek
Cc: Marek Vasut
Cc: Tom Rini
Cc: Albert Aribaud
Cc: Wolfgang Denk -
Move icache_enable() and dcache_enable() function calls from
board code into the CPU code and into the enable_caches()
function. This is how the cache enabling code was designed
to work.Signed-off-by: Marek Vasut
Cc: Dinh Nguyen
Cc: Pavel Machek
Cc: Marek Vasut
Cc: Tom Rini
Cc: Albert Aribaud
Cc: Wolfgang Denk
Acked-by: Pavel Machek -
Add code which configures the AMBA NIC-301 and the SCU on the SoCFPGA .
The code sets the access permissions for the CPU to the AMBA slaves such
that the CPU can access them in both secure and non-secure mode.Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Albert Aribaud
Cc: Tom Rini
Cc: Wolfgang Denk
Cc: Pavel Machek -
Configure the PL310 address filter to make sure DRAM is mapped to 0x0.
This code also configures the "remap" register of NIC-301 and sets the
required 'mpuzero' bit.Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Albert Aribaud
Cc: Tom Rini
Cc: Wolfgang Denk
Cc: Pavel Machek
Acked-by: Pavel Machek -
Add register definition for the NIC-301 used on SoCFPGA.
Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Albert Aribaud
Cc: Tom Rini
Cc: Wolfgang Denk
Cc: Pavel Machek
Acked-by: Pavel Machek -
Add the Snoop Control Unit register definition file.
Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Albert Aribaud
Cc: Tom Rini
Cc: Wolfgang Denk
Cc: Pavel Machek
Acked-by: Pavel Machek -
Add missing system manager bits from Altera U-Boot to make the code
comparable. These are the bits which depend on the FPGA manager.Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Albert Aribaud
Cc: Tom Rini
Cc: Wolfgang Denk
Cc: Pavel Machek
Acked-by: Pavel Machek -
Add function to enable and disable FPGA bridges. This code is used
by the FPGA manager to disable the bridges before programming the
FPGA and will later be also used by the initialization code for the
chip to put the chip into well defined state during startup.Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Albert Aribaud
Cc: Tom Rini
Cc: Wolfgang Denk
Cc: Pavel Machek
Acked-by: Pavel Machek -
Add code necessary to program the FPGA part of SoCFPGA from U-Boot
with an RBF blob. This patch also integrates the code into the
FPGA driver framework in U-Boot so it can be used via the 'fpga'
command.Signed-off-by: Pavel Machek
Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Albert Aribaud
Cc: Tom Rini
Cc: Wolfgang Denk
Cc: Pavel MachekV2: Move the not-CPU specific stuff into drivers/fpga/ and base
this on the cleaned up altera FPGA support. -
Cosmetic change to the print_cpuinfo() function output. Align the
output with the rest of initial output produced by U-Boot.Signed-off-by: Pavel Machek
Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Albert Aribaud
Cc: Tom Rini
Cc: Wolfgang Denk
Cc: Pavel Machek -
Add CPU function to register and initialize the dw_mmc SD controller.
This allows us to use the HPS SDMMC block.Signed-off-by: Pavel Machek
Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Albert Aribaud
Cc: Tom Rini
Cc: Wolfgang Denk
Cc: Pavel Machek -
Add function to initialize the EMAC blocks upon board startup.
The preprocessor guards against building on SoCFPGA-VT and against
SPL build are not needed as those are handled implicitly via both
SPL framework and the socfpga_cyclone5.h config file, which will
not define CONFIG_DESIGNWARE_ETH if building for SoCFPGA-VT.We cannot handle two EMAC ethernet blocks yet, therefore the ifdefs.
Once there is hardware using both EMAC blocks, this ifdef will have
to go.Signed-off-by: Pavel Machek
Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Albert Aribaud
Cc: Tom Rini
Cc: Wolfgang Denk
Cc: Pavel Machek -
Add functions to reset the EMAC ethernet blocks. We cannot handle
two EMAC ethernet blocks yet, therefore the ifdefs. Once there is
hardware using both EMAC blocks, this ifdef will have to go.Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Albert Aribaud
Cc: Tom Rini
Cc: Wolfgang Denk
Cc: Pavel Machek
Acked-by: Pavel Machek -
The timer reload value is a property of the timer hardware and there
is no reason for this to be configurable. Place this into the timer
driver just like on the other hardware.Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Albert Aribaud
Cc: Tom Rini
Cc: Wolfgang Denk
Cc: Pavel Machek
Acked-by: Dinh Nguyen
Acked-by: Pavel Machek
